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Searched refs:thres (Results 1 – 19 of 19) sorted by relevance

/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dpcnt_ll.h222 static inline void pcnt_ll_enable_thres_event(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, bool e… in pcnt_ll_enable_thres_event() argument
224 if (thres == 0) { in pcnt_ll_enable_thres_event()
278 static inline void pcnt_ll_set_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, int value) in pcnt_ll_set_thres_value() argument
281 if (thres == 0) { in pcnt_ll_set_thres_value()
325 static inline int pcnt_ll_get_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres) in pcnt_ll_get_thres_value() argument
329 if (thres == 0) { in pcnt_ll_get_thres_value()
Drmt_ll.h544 static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) in rmt_ll_rx_set_idle_thres() argument
546 dev->chmconf[channel].conf0.idle_thres_chm = thres; in rmt_ll_rx_set_idle_thres()
583 static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) in rmt_ll_rx_set_filter_thres() argument
585 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->chmconf[channel].conf1, rx_filter_thres_chm, thres); in rmt_ll_rx_set_filter_thres()
/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dpcnt_ll.h222 static inline void pcnt_ll_enable_thres_event(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, bool e… in pcnt_ll_enable_thres_event() argument
224 if (thres == 0) { in pcnt_ll_enable_thres_event()
278 static inline void pcnt_ll_set_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, int value) in pcnt_ll_set_thres_value() argument
281 if (thres == 0) { in pcnt_ll_set_thres_value()
325 static inline int pcnt_ll_get_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres) in pcnt_ll_get_thres_value() argument
329 if (thres == 0) { in pcnt_ll_get_thres_value()
Drmt_ll.h521 static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) in rmt_ll_rx_set_idle_thres() argument
523 dev->chmconf[channel].conf0.idle_thres_chm = thres; in rmt_ll_rx_set_idle_thres()
560 static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) in rmt_ll_rx_set_filter_thres() argument
562 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->chmconf[channel].conf1, rx_filter_thres_chm, thres); in rmt_ll_rx_set_filter_thres()
Dparlio_ll.h316 static inline void parlio_ll_rx_set_timeout_thres(parl_io_dev_t *dev, uint32_t thres) in parlio_ll_rx_set_timeout_thres() argument
318 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->rx_cfg1, rx_timeout_threshold, thres); in parlio_ll_rx_set_timeout_thres()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dpcnt_ll.h222 static inline void pcnt_ll_enable_thres_event(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, bool e… in pcnt_ll_enable_thres_event() argument
224 if (thres == 0) { in pcnt_ll_enable_thres_event()
278 static inline void pcnt_ll_set_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, int value) in pcnt_ll_set_thres_value() argument
281 if (thres == 0) { in pcnt_ll_set_thres_value()
325 static inline int pcnt_ll_get_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres) in pcnt_ll_get_thres_value() argument
329 if (thres == 0) { in pcnt_ll_get_thres_value()
Drmt_ll.h498 static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) in rmt_ll_rx_set_idle_thres() argument
500 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->conf_ch[channel].conf0, idle_thres_chn, thres); in rmt_ll_rx_set_idle_thres()
537 static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) in rmt_ll_rx_set_filter_thres() argument
539 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->conf_ch[channel].conf1, rx_filter_thres_chn, thres); in rmt_ll_rx_set_filter_thres()
Di2c_ll.h570 hw->scl_filter_cfg.thres = filter_num; in i2c_ll_set_filter()
571 hw->sda_filter_cfg.thres = filter_num; in i2c_ll_set_filter()
589 *filter_conf = hw->sda_filter_cfg.thres; in i2c_ll_get_filter()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dpcnt_ll.h222 static inline void pcnt_ll_enable_thres_event(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, bool e… in pcnt_ll_enable_thres_event() argument
224 if (thres == 0) { in pcnt_ll_enable_thres_event()
278 static inline void pcnt_ll_set_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, int value) in pcnt_ll_set_thres_value() argument
281 if (thres == 0) { in pcnt_ll_set_thres_value()
325 static inline int pcnt_ll_get_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres) in pcnt_ll_get_thres_value() argument
329 if (thres == 0) { in pcnt_ll_get_thres_value()
Drmt_ll.h518 static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) in rmt_ll_rx_set_idle_thres() argument
520 dev->chmconf[channel].conf0.idle_thres_chm = thres; in rmt_ll_rx_set_idle_thres()
557 static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) in rmt_ll_rx_set_filter_thres() argument
559 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->chmconf[channel].conf1, rx_filter_thres_chm, thres); in rmt_ll_rx_set_filter_thres()
Dparlio_ll.h320 static inline void parlio_ll_rx_set_timeout_thres(parl_io_dev_t *dev, uint32_t thres) in parlio_ll_rx_set_timeout_thres() argument
322 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->rx_genrl_cfg, rx_timeout_thres, thres); in parlio_ll_rx_set_timeout_thres()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dpcnt_ll.h223 static inline void pcnt_ll_enable_thres_event(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, bool e… in pcnt_ll_enable_thres_event() argument
225 if (thres == 0) { in pcnt_ll_enable_thres_event()
279 static inline void pcnt_ll_set_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, int value) in pcnt_ll_set_thres_value() argument
282 if (thres == 0) { in pcnt_ll_set_thres_value()
326 static inline int pcnt_ll_get_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres) in pcnt_ll_get_thres_value() argument
330 if (thres == 0) { in pcnt_ll_get_thres_value()
Di2c_ll.h111 if (hw->scl_filter_cfg.thres <= 2) { in i2c_ll_set_bus_timing()
114 assert(hw->scl_filter_cfg.thres <= 7); in i2c_ll_set_bus_timing()
115 scl_high -= hw->scl_filter_cfg.thres + 6; in i2c_ll_set_bus_timing()
556 hw->scl_filter_cfg.thres = filter_num; in i2c_ll_set_filter()
557 hw->sda_filter_cfg.thres = filter_num; in i2c_ll_set_filter()
575 *filter_conf = hw->sda_filter_cfg.thres; in i2c_ll_get_filter()
Dbrownout_ll.h63 RTCCNTL.brown_out.thres = threshold; in brownout_ll_set_threshold()
Drmt_ll.h391 static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) in rmt_ll_rx_set_idle_thres() argument
393 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->conf_ch[channel].conf0, idle_thres, thres); in rmt_ll_rx_set_idle_thres()
430 static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) in rmt_ll_rx_set_filter_thres() argument
432 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->conf_ch[channel].conf1, rx_filter_thres, thres); in rmt_ll_rx_set_filter_thres()
/hal_espressif-latest/components/soc/esp32/include/soc/
Di2c_struct.h240 …uint32_t thres: 3; /*When input SCL's pulse width is smaller than this regist… member
248 …uint32_t thres: 3; /*When input SCL's pulse width is smaller than this regist… member
Drtc_cntl_struct.h540 uint32_t thres: 3; /*brown out threshold*/ member
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Drmt_ll.h506 static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) in rmt_ll_rx_set_idle_thres() argument
508 dev->rx_conf[channel].conf0.idle_thres = thres; in rmt_ll_rx_set_idle_thres()
545 static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) in rmt_ll_rx_set_filter_thres() argument
547 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->rx_conf[channel].conf1, rx_filter_thres, thres); in rmt_ll_rx_set_filter_thres()
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Di2c_struct.h256 uint32_t thres: 4; member
264 uint32_t thres: 4; member