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Searched refs:slow_clk_dcap (Results 1 – 14 of 14) sorted by relevance

/hal_espressif-latest/components/soc/esp32c6/include/soc/
Drtc.h178 …uint32_t slow_clk_dcap : 8; //!< RC_SLOW clock adjustment parameter (higher value l… member
193 .slow_clk_dcap = RTC_CNTL_SCK_DCAP_DEFAULT, \
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Drtc.h182 …uint32_t slow_clk_dcap : 8; //!< RC_SLOW clock adjustment parameter (higher value l… member
197 .slow_clk_dcap = RTC_CNTL_SCK_DCAP_DEFAULT, \
/hal_espressif-latest/components/esp_hw_support/port/esp32c2/
Drtc_clk_init.c37 REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_SCK_DCAP, cfg.slow_clk_dcap); in rtc_clk_init()
/hal_espressif-latest/components/esp_hw_support/port/esp32s2/
Drtc_clk_init.c36 REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_SCK_DCAP, cfg.slow_clk_dcap); in rtc_clk_init()
/hal_espressif-latest/components/esp_hw_support/port/esp32s3/
Drtc_clk_init.c34 REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_SCK_DCAP, cfg.slow_clk_dcap); in rtc_clk_init()
/hal_espressif-latest/components/esp_hw_support/port/esp32c3/
Drtc_clk_init.c37 REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_SCK_DCAP, cfg.slow_clk_dcap); in rtc_clk_init()
/hal_espressif-latest/components/esp_hw_support/port/esp32h2/
Drtc_clk_init.c42 REGI2C_WRITE_MASK(I2C_PMU, I2C_PMU_OC_SCK_DCAP, cfg.slow_clk_dcap); in rtc_clk_init()
/hal_espressif-latest/components/soc/esp32/include/soc/
Drtc.h116 …uint32_t slow_clk_dcap : 8; //!< RTC 150k clock adjustment parameter (higher value … member
129 .slow_clk_dcap = RTC_CNTL_SCK_DCAP_DEFAULT, \
/hal_espressif-latest/components/esp_hw_support/port/esp32c6/
Drtc_clk_init.c75 REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_SCK_DCAP, cfg.slow_clk_dcap); in rtc_clk_init()
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Drtc.h185 …uint32_t slow_clk_dcap : 8; //!< RTC 150k clock adjustment parameter (higher value … member
199 .slow_clk_dcap = RTC_CNTL_SCK_DCAP_DEFAULT, \
/hal_espressif-latest/components/esp_hw_support/port/esp32/
Drtc_clk_init.c61 REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_SCK_DCAP, cfg.slow_clk_dcap); in rtc_clk_init()
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Drtc.h184 …uint32_t slow_clk_dcap : 8; //!< RTC 150k clock adjustment parameter (higher value … member
198 .slow_clk_dcap = RTC_CNTL_SCK_DCAP_DEFAULT, \
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Drtc.h190 …uint32_t slow_clk_dcap : 8; //!< RTC 150k clock adjustment parameter (higher value … member
204 .slow_clk_dcap = RTC_CNTL_SCK_DCAP_DEFAULT, \
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Drtc.h188 …uint32_t slow_clk_dcap : 8; //!< RTC 90k clock adjustment parameter (higher value l… member
202 .slow_clk_dcap = RTC_CNTL_SCK_DCAP_DEFAULT, \