Searched refs:reg_split_addr (Results 1 – 2 of 2) sorted by relevance
131 uint32_t reg_split_addr = PERI1_RTCSLOW_ADDR_TO_CONF_REG(addr); in memprot_ll_peri1_rtcslow_set_prot() local149 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_DPORT_1_REG, reg_split_addr | permission_mask); in memprot_ll_peri1_rtcslow_set_prot()289 uint32_t reg_split_addr = PERI2_RTCSLOW_0_ADDR_TO_CONF_REG(addr); in memprot_ll_peri2_rtcslow_0_set_prot() local313 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_AHB_1_REG, reg_split_addr | permission_mask); in memprot_ll_peri2_rtcslow_0_set_prot()377 uint32_t reg_split_addr = PERI2_RTCSLOW_1_ADDR_TO_CONF_REG(addr); in memprot_ll_peri2_rtcslow_1_set_prot() local401 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_AHB_2_REG, reg_split_addr | permission_mask); in memprot_ll_peri2_rtcslow_1_set_prot()
332 uint32_t reg_split_addr = 0; in memprot_ll_iram0_sram_set_prot() local335 reg_split_addr = IRAM0_SRAM_ADDR_TO_CONF_REG(addr); //cfg reg - [16:0] in memprot_ll_iram0_sram_set_prot()361 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_IRAM0_2_REG, (uint32_t)(reg_split_addr | permission_mask)); in memprot_ll_iram0_sram_set_prot()433 uint32_t reg_split_addr = IRAM0_RTCFAST_ADDR_TO_CONF_REG(addr); in memprot_ll_iram0_rtcfast_set_prot() local457 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_IRAM0_3_REG, reg_split_addr | permission_mask); in memprot_ll_iram0_rtcfast_set_prot()740 uint32_t reg_split_addr = DRAM0_SRAM_ADDR_TO_CONF_REG(addr); in memprot_ll_dram0_sram_set_prot() local758 …DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_DRAM0_1_REG, reg_split_addr | permission_mask | uni_block_perm); in memprot_ll_dram0_sram_set_prot()817 uint32_t reg_split_addr = DRAM0_RTCFAST_ADDR_TO_CONF_REG(addr); in memprot_ll_dram0_rtcfast_set_prot() local835 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_DRAM0_2_REG, reg_split_addr | permission_mask); in memprot_ll_dram0_rtcfast_set_prot()
