Searched refs:iomux_reg_val (Results 1 – 7 of 7) sorted by relevance
62 uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); in gpio_ll_get_io_config() local63 *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; in gpio_ll_get_io_config()64 *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; in gpio_ll_get_io_config()65 *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; in gpio_ll_get_io_config()68 *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; in gpio_ll_get_io_config()69 *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; in gpio_ll_get_io_config()71 *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; in gpio_ll_get_io_config()
59 uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); in gpio_ll_get_io_config() local60 *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; in gpio_ll_get_io_config()61 *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; in gpio_ll_get_io_config()62 *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; in gpio_ll_get_io_config()65 *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; in gpio_ll_get_io_config()66 *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; in gpio_ll_get_io_config()68 *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; in gpio_ll_get_io_config()
55 uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); in gpio_ll_get_io_config() local56 *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; in gpio_ll_get_io_config()57 *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; in gpio_ll_get_io_config()58 *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; in gpio_ll_get_io_config()61 *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; in gpio_ll_get_io_config()62 *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; in gpio_ll_get_io_config()64 *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; in gpio_ll_get_io_config()
58 uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); in gpio_ll_get_io_config() local59 *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; in gpio_ll_get_io_config()60 *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; in gpio_ll_get_io_config()61 *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; in gpio_ll_get_io_config()64 *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; in gpio_ll_get_io_config()65 *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; in gpio_ll_get_io_config()67 *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; in gpio_ll_get_io_config()
63 uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); in gpio_ll_get_io_config() local64 *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; in gpio_ll_get_io_config()65 *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; in gpio_ll_get_io_config()66 *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; in gpio_ll_get_io_config()69 *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; in gpio_ll_get_io_config()70 *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; in gpio_ll_get_io_config()72 *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; in gpio_ll_get_io_config()
61 uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); in gpio_ll_get_io_config() local62 *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; in gpio_ll_get_io_config()63 *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; in gpio_ll_get_io_config()64 *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; in gpio_ll_get_io_config()67 *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; in gpio_ll_get_io_config()68 *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; in gpio_ll_get_io_config()70 *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; in gpio_ll_get_io_config()