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Searched refs:io_mask (Results 1 – 10 of 10) sorted by relevance

/hal_espressif-latest/components/hal/esp32s2/include/hal/
Drtc_cntl_ll.h38 FORCE_INLINE_ATTR void rtc_cntl_ll_ext1_set_wakeup_pins(uint32_t io_mask, uint32_t mode_mask) in rtc_cntl_ll_ext1_set_wakeup_pins() argument
41 HAL_ASSERT((io_mask & mode_mask) == io_mask || (io_mask & mode_mask) == 0); in rtc_cntl_ll_ext1_set_wakeup_pins()
42 REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, io_mask); in rtc_cntl_ll_ext1_set_wakeup_pins()
43 if ((io_mask & mode_mask) == io_mask) { in rtc_cntl_ll_ext1_set_wakeup_pins()
/hal_espressif-latest/components/hal/esp32/include/hal/
Drtc_cntl_ll.h36 FORCE_INLINE_ATTR void rtc_cntl_ll_ext1_set_wakeup_pins(uint32_t io_mask, uint32_t mode_mask) in rtc_cntl_ll_ext1_set_wakeup_pins() argument
39 HAL_ASSERT((io_mask & mode_mask) == io_mask || (io_mask & mode_mask) == 0); in rtc_cntl_ll_ext1_set_wakeup_pins()
40 REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, io_mask); in rtc_cntl_ll_ext1_set_wakeup_pins()
41 if ((io_mask & mode_mask) == io_mask) { in rtc_cntl_ll_ext1_set_wakeup_pins()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Drtc_cntl_ll.h42 FORCE_INLINE_ATTR void rtc_cntl_ll_ext1_set_wakeup_pins(uint32_t io_mask, uint32_t mode_mask) in rtc_cntl_ll_ext1_set_wakeup_pins() argument
45 HAL_ASSERT((io_mask & mode_mask) == io_mask || (io_mask & mode_mask) == 0); in rtc_cntl_ll_ext1_set_wakeup_pins()
46 REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, io_mask); in rtc_cntl_ll_ext1_set_wakeup_pins()
47 if ((io_mask & mode_mask) == io_mask) { in rtc_cntl_ll_ext1_set_wakeup_pins()
/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dlp_aon_hal.h13 #define rtc_hal_ext1_set_wakeup_pins(io_mask, mode_mask) lp_aon_ll_ext1_set_wakeup_pins(io_m… argument
Dlp_aon_ll.h48 static inline void lp_aon_ll_ext1_set_wakeup_pins(uint32_t io_mask, uint32_t level_mask) in lp_aon_ll_ext1_set_wakeup_pins() argument
50 HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.ext_wakeup_cntl, ext_wakeup_sel, io_mask); in lp_aon_ll_ext1_set_wakeup_pins()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dlp_aon_hal.h13 #define rtc_hal_ext1_set_wakeup_pins(io_mask, mode_mask) lp_aon_ll_ext1_set_wakeup_pins(io_m… argument
Dlp_aon_ll.h48 static inline void lp_aon_ll_ext1_set_wakeup_pins(uint32_t io_mask, uint32_t level_mask) in lp_aon_ll_ext1_set_wakeup_pins() argument
50 HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.ext_wakeup_cntl, ext_wakeup_sel, io_mask); in lp_aon_ll_ext1_set_wakeup_pins()
/hal_espressif-latest/components/esp_hw_support/include/
Desp_sleep.h294 esp_err_t esp_sleep_enable_ext1_wakeup(uint64_t io_mask, esp_sleep_ext1_wakeup_mode_t level_mode);
345 esp_err_t esp_sleep_enable_ext1_wakeup_io(uint64_t io_mask, esp_sleep_ext1_wakeup_mode_t level_mode…
363 esp_err_t esp_sleep_disable_ext1_wakeup_io(uint64_t io_mask);
403 esp_err_t esp_sleep_enable_ext1_wakeup_with_level_mask(uint64_t io_mask, uint64_t level_mask);
/hal_espressif-latest/components/hal/include/hal/
Drtc_hal.h48 #define rtc_hal_ext1_set_wakeup_pins(io_mask, mode_mask) rtc_cntl_ll_ext1_set_wakeup_pins(io_mas… argument
/hal_espressif-latest/components/esp_hw_support/
Dsleep_modes.c1580 esp_err_t esp_sleep_enable_ext1_wakeup(uint64_t io_mask, esp_sleep_ext1_wakeup_mode_t level_mode) argument
1582 if (io_mask == 0 && level_mode > ESP_EXT1_WAKEUP_ANY_HIGH) {
1588 return esp_sleep_enable_ext1_wakeup_io(io_mask, level_mode);
1592 esp_err_t esp_sleep_enable_ext1_wakeup_io(uint64_t io_mask, esp_sleep_ext1_wakeup_mode_t level_mode) argument
1594 if (io_mask == 0 && level_mode > ESP_EXT1_WAKEUP_ANY_HIGH) {
1599 for (int gpio = 0; io_mask; ++gpio, io_mask >>= 1) {
1600 if ((io_mask & 1) == 0) {
1636 esp_err_t esp_sleep_disable_ext1_wakeup_io(uint64_t io_mask) argument
1638 if (io_mask == 0) {
1644 for (int gpio = 0; io_mask; ++gpio, io_mask >>= 1) {
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