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Searched refs:intr_mask (Results 1 – 25 of 32) sorted by relevance

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/hal_espressif-latest/components/hal/esp32c3/include/hal/
Duhci_ll.h103 static inline void uhci_ll_enable_intr(uhci_dev_t *hw, uint32_t intr_mask) in uhci_ll_enable_intr() argument
105 hw->int_ena.val |= intr_mask; in uhci_ll_enable_intr()
108 static inline void uhci_ll_disable_intr(uhci_dev_t *hw, uint32_t intr_mask) in uhci_ll_disable_intr() argument
110 hw->int_ena.val &= (~intr_mask); in uhci_ll_disable_intr()
113 static inline void uhci_ll_clear_intr(uhci_dev_t *hw, uint32_t intr_mask) in uhci_ll_clear_intr() argument
115 hw->int_clr.val = intr_mask; in uhci_ll_clear_intr()
Dspi_ll.h1018 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_enable_intr() argument
1020 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1; in spi_ll_enable_intr()
1025 static inline void spi_ll_disable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_disable_intr() argument
1027 #define DIS_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 0; in spi_ll_disable_intr()
1032 static inline void spi_ll_set_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_set_intr() argument
1034 #define SET_INTR(intr_bit, _, st_reg, ...) if (intr_mask & (intr_bit)) hw->st_reg = 1; in spi_ll_set_intr()
1039 static inline void spi_ll_clear_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_clear_intr() argument
1041 #define CLR_INTR(intr_bit, _, __, clr_reg) if (intr_mask & (intr_bit)) hw->clr_reg; in spi_ll_clear_intr()
1046 static inline bool spi_ll_get_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_get_intr() argument
1048 #define GET_INTR(intr_bit, _, st_reg, ...) if (intr_mask & (intr_bit) && hw->st_reg) return true; in spi_ll_get_intr()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Duhci_ll.h104 static inline void uhci_ll_enable_intr(uhci_dev_t *hw, uint32_t intr_mask) in uhci_ll_enable_intr() argument
106 hw->int_ena.val |= intr_mask; in uhci_ll_enable_intr()
109 static inline void uhci_ll_disable_intr(uhci_dev_t *hw, uint32_t intr_mask) in uhci_ll_disable_intr() argument
111 hw->int_ena.val &= (~intr_mask); in uhci_ll_disable_intr()
114 static inline void uhci_ll_clear_intr(uhci_dev_t *hw, uint32_t intr_mask) in uhci_ll_clear_intr() argument
116 hw->int_clr.val = intr_mask; in uhci_ll_clear_intr()
Dspi_ll.h1033 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_enable_intr() argument
1035 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1; in spi_ll_enable_intr()
1040 static inline void spi_ll_disable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_disable_intr() argument
1042 #define DIS_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 0; in spi_ll_disable_intr()
1047 static inline void spi_ll_set_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_set_intr() argument
1049 #define SET_INTR(intr_bit, _, __, ___, set_reg) if (intr_mask & (intr_bit)) hw->set_reg = 1; in spi_ll_set_intr()
1054 static inline void spi_ll_clear_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_clear_intr() argument
1056 #define CLR_INTR(intr_bit, _, __, clr_reg, ...) if (intr_mask & (intr_bit)) hw->clr_reg = 1; in spi_ll_clear_intr()
1061 static inline bool spi_ll_get_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_get_intr() argument
1063 #define GET_INTR(intr_bit, _, raw_reg, ...) if (intr_mask & (intr_bit) && hw->raw_reg) return true; in spi_ll_get_intr()
/hal_espressif-latest/components/hal/esp32c6/include/hal/
Duhci_ll.h98 static inline void uhci_ll_enable_intr(uhci_dev_t *hw, uint32_t intr_mask) in uhci_ll_enable_intr() argument
100 hw->int_ena.val |= intr_mask; in uhci_ll_enable_intr()
103 static inline void uhci_ll_disable_intr(uhci_dev_t *hw, uint32_t intr_mask) in uhci_ll_disable_intr() argument
105 hw->int_ena.val &= (~intr_mask); in uhci_ll_disable_intr()
108 static inline void uhci_ll_clear_intr(uhci_dev_t *hw, uint32_t intr_mask) in uhci_ll_clear_intr() argument
110 hw->int_clr.val = intr_mask; in uhci_ll_clear_intr()
Dspi_ll.h1022 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_enable_intr() argument
1024 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1; in spi_ll_enable_intr()
1029 static inline void spi_ll_disable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_disable_intr() argument
1031 #define DIS_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 0; in spi_ll_disable_intr()
1036 static inline void spi_ll_set_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_set_intr() argument
1038 #define SET_INTR(intr_bit, _, __, ___, set_reg) if (intr_mask & (intr_bit)) hw->set_reg = 1; in spi_ll_set_intr()
1043 static inline void spi_ll_clear_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_clear_intr() argument
1045 #define CLR_INTR(intr_bit, _, __, clr_reg, ...) if (intr_mask & (intr_bit)) hw->clr_reg = 1; in spi_ll_clear_intr()
1050 static inline bool spi_ll_get_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_get_intr() argument
1052 #define GET_INTR(intr_bit, _, st_reg, ...) if (intr_mask & (intr_bit) && hw->st_reg) return true; in spi_ll_get_intr()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Duhci_ll.h97 static inline void uhci_ll_enable_intr(uhci_dev_t *hw, uint32_t intr_mask) in uhci_ll_enable_intr() argument
99 hw->int_ena.val |= intr_mask; in uhci_ll_enable_intr()
102 static inline void uhci_ll_disable_intr(uhci_dev_t *hw, uint32_t intr_mask) in uhci_ll_disable_intr() argument
104 hw->int_ena.val &= (~intr_mask); in uhci_ll_disable_intr()
107 static inline void uhci_ll_clear_intr(uhci_dev_t *hw, uint32_t intr_mask) in uhci_ll_clear_intr() argument
109 hw->int_clr.val = intr_mask; in uhci_ll_clear_intr()
Dspi_ll.h1024 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_enable_intr() argument
1026 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1; in spi_ll_enable_intr()
1031 static inline void spi_ll_disable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_disable_intr() argument
1033 #define DIS_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 0; in spi_ll_disable_intr()
1038 static inline void spi_ll_set_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_set_intr() argument
1040 #define SET_INTR(intr_bit, _, __, ___, set_reg) if (intr_mask & (intr_bit)) hw->set_reg = 1; in spi_ll_set_intr()
1045 static inline void spi_ll_clear_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_clear_intr() argument
1047 #define CLR_INTR(intr_bit, _, __, clr_reg, ...) if (intr_mask & (intr_bit)) hw->clr_reg = 1; in spi_ll_clear_intr()
1052 static inline bool spi_ll_get_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_get_intr() argument
1054 #define GET_INTR(intr_bit, _, st_reg, ...) if (intr_mask & (intr_bit) && hw->st_reg) return true; in spi_ll_get_intr()
/hal_espressif-latest/components/esp_hw_support/include/
Desp_cpu.h373 FORCE_INLINE_ATTR void esp_cpu_intr_enable(uint32_t intr_mask) in esp_cpu_intr_enable() argument
376 z_xt_ints_on(intr_mask); in esp_cpu_intr_enable()
378 rv_utils_intr_enable(intr_mask); in esp_cpu_intr_enable()
387 FORCE_INLINE_ATTR void esp_cpu_intr_disable(uint32_t intr_mask) in esp_cpu_intr_disable() argument
390 z_xt_ints_off(intr_mask); in esp_cpu_intr_disable()
392 rv_utils_intr_disable(intr_mask); in esp_cpu_intr_disable()
/hal_espressif-latest/components/riscv/include/riscv/
Drv_utils.h84 FORCE_INLINE_ATTR void rv_utils_intr_enable(uint32_t intr_mask) in rv_utils_intr_enable() argument
88 esprv_intc_int_enable(intr_mask); in rv_utils_intr_enable()
92 FORCE_INLINE_ATTR void rv_utils_intr_disable(uint32_t intr_mask) in rv_utils_intr_disable() argument
96 esprv_intc_int_disable(intr_mask); in rv_utils_intr_disable()
/hal_espressif-latest/components/driver/touch_sensor/esp32s2/
Dtouch_sensor.c66 uint32_t intr_mask = touch_hal_read_intr_status_mask(); in touch_pad_workaround_isr_internal() local
69 if (intr_mask & TOUCH_PAD_INTR_MASK_SCAN_DONE) { in touch_pad_workaround_isr_internal()
82 esp_err_t touch_pad_isr_register(intr_handler_t fn, void *arg, touch_pad_intr_mask_t intr_mask) in touch_pad_isr_register() argument
86 TOUCH_INTR_MASK_CHECK(intr_mask); in touch_pad_isr_register()
89 if (intr_mask & TOUCH_PAD_INTR_MASK_DONE) { in touch_pad_isr_register()
92 if (intr_mask & TOUCH_PAD_INTR_MASK_ACTIVE) { in touch_pad_isr_register()
95 if (intr_mask & TOUCH_PAD_INTR_MASK_INACTIVE) { in touch_pad_isr_register()
98 if (intr_mask & TOUCH_PAD_INTR_MASK_SCAN_DONE) { in touch_pad_isr_register()
101 if (intr_mask & TOUCH_PAD_INTR_MASK_TIMEOUT) { in touch_pad_isr_register()
105 if (intr_mask & TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE) { in touch_pad_isr_register()
[all …]
/hal_espressif-latest/components/driver/touch_sensor/esp32s3/
Dtouch_sensor.c62 esp_err_t touch_pad_isr_register(intr_handler_t fn, void *arg, touch_pad_intr_mask_t intr_mask) in touch_pad_isr_register() argument
65 TOUCH_INTR_MASK_CHECK(intr_mask); in touch_pad_isr_register()
68 if (intr_mask & TOUCH_PAD_INTR_MASK_DONE) { in touch_pad_isr_register()
71 if (intr_mask & TOUCH_PAD_INTR_MASK_ACTIVE) { in touch_pad_isr_register()
74 if (intr_mask & TOUCH_PAD_INTR_MASK_INACTIVE) { in touch_pad_isr_register()
77 if (intr_mask & TOUCH_PAD_INTR_MASK_SCAN_DONE) { in touch_pad_isr_register()
80 if (intr_mask & TOUCH_PAD_INTR_MASK_TIMEOUT) { in touch_pad_isr_register()
84 if (intr_mask & TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE) { in touch_pad_isr_register()
/hal_espressif-latest/components/xtensa/include/
Dxt_utils.h101 uint32_t intr_mask; in xt_utils_intr_get_enabled_mask() local
102 RSR(INTENABLE, intr_mask); in xt_utils_intr_get_enabled_mask()
103 return intr_mask; in xt_utils_intr_get_enabled_mask()
/hal_espressif-latest/components/bt/controller/esp32/
Dhli_api.c23 uint32_t intr_mask; member
54 …p_err_t hli_intr_register(intr_handler_t handler, void* arg, uint32_t intr_reg, uint32_t intr_mask) in hli_intr_register() argument
62 hip->intr_mask = intr_mask; in hli_intr_register()
90 if ((val & hip->intr_mask) != 0) { in hli_c_handler()
Dhli_api.h47 …_err_t hli_intr_register(intr_handler_t handler, void* arg, uint32_t intr_reg, uint32_t intr_mask);
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dspi_ll.h1018 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_enable_intr() argument
1020 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1; in spi_ll_enable_intr()
1025 static inline void spi_ll_disable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_disable_intr() argument
1027 #define DIS_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 0; in spi_ll_disable_intr()
1032 static inline void spi_ll_set_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_set_intr() argument
1034 #define SET_INTR(intr_bit, _, __, ___, set_reg) if (intr_mask & (intr_bit)) hw->set_reg = 1; in spi_ll_set_intr()
1039 static inline void spi_ll_clear_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_clear_intr() argument
1041 #define CLR_INTR(intr_bit, _, __, clr_reg, ...) if (intr_mask & (intr_bit)) hw->clr_reg = 1; in spi_ll_clear_intr()
1046 static inline bool spi_ll_get_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_get_intr() argument
1048 #define GET_INTR(intr_bit, _, raw_reg, ...) if (intr_mask & (intr_bit) && hw->raw_reg) return true; in spi_ll_get_intr()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dspi_ll.h1010 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_enable_intr() argument
1012 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1; in spi_ll_enable_intr()
1018 static inline void spi_ll_disable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_disable_intr() argument
1020 #define DIS_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 0; in spi_ll_disable_intr()
1025 static inline void spi_ll_set_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_set_intr() argument
1027 #define SET_INTR(intr_bit, _, st_reg, ...) if (intr_mask & (intr_bit)) hw->st_reg = 1; in spi_ll_set_intr()
1033 static inline void spi_ll_clear_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_clear_intr() argument
1035 #define CLR_INTR(intr_bit, _, __, clr_reg) if (intr_mask & (intr_bit)) hw->clr_reg; in spi_ll_clear_intr()
1041 static inline bool spi_ll_get_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask) in spi_ll_get_intr() argument
1043 #define GET_INTR(intr_bit, _, st_reg, ...) if (intr_mask & (intr_bit) && hw->st_reg) return true; in spi_ll_get_intr()
Dtwai_ll.h374 static inline void twai_ll_set_enabled_intrs(twai_dev_t *hw, uint32_t intr_mask) in twai_ll_set_enabled_intrs() argument
376 hw->interrupt_enable_reg.val = intr_mask; in twai_ll_set_enabled_intrs()
/hal_espressif-latest/components/hal/
Dtwai_hal.c56 …ming_config_t *t_config, const twai_filter_config_t *f_config, uint32_t intr_mask, uint32_t clkout… in twai_hal_configure() argument
77 twai_ll_set_enabled_intrs(hal_ctx->dev, intr_mask); in twai_hal_configure()
/hal_espressif-latest/components/driver/deprecated/driver/
Dtimer.h280 esp_err_t timer_group_intr_enable(timer_group_t group_num, timer_intr_t intr_mask);
294 esp_err_t timer_group_intr_disable(timer_group_t group_num, timer_intr_t intr_mask);
/hal_espressif-latest/components/hal/include/hal/
Dusb_dwc_ll.h306 static inline void usb_dwc_ll_gintmsk_en_intrs(usb_dwc_dev_t *hw, uint32_t intr_mask) in usb_dwc_ll_gintmsk_en_intrs() argument
308 hw->gintmsk_reg.val |= intr_mask; in usb_dwc_ll_gintmsk_en_intrs()
311 static inline void usb_dwc_ll_gintmsk_dis_intrs(usb_dwc_dev_t *hw, uint32_t intr_mask) in usb_dwc_ll_gintmsk_dis_intrs() argument
313 hw->gintmsk_reg.val &= ~intr_mask; in usb_dwc_ll_gintmsk_dis_intrs()
665 static inline void usb_dwc_ll_hprt_intr_clear(usb_dwc_dev_t *hw, uint32_t intr_mask) in usb_dwc_ll_hprt_intr_clear() argument
669 … hw->hprt_reg.val = ((hprt.val & ~USB_DWC_LL_HPRT_ENA_MSK) & ~USB_DWC_LL_HPRT_W1C_MSK) | intr_mask; in usb_dwc_ll_hprt_intr_clear()
/hal_espressif-latest/components/esp_wifi/esp32c6/
Desp_adapter.c129 static void enable_intr_wrapper(uint32_t intr_mask) in enable_intr_wrapper() argument
131 esprv_intc_int_enable(intr_mask); in enable_intr_wrapper()
134 static void disable_intr_wrapper(uint32_t intr_mask) in disable_intr_wrapper() argument
136 esprv_intc_int_disable(intr_mask); in disable_intr_wrapper()
/hal_espressif-latest/components/esp_wifi/esp32c2/
Desp_adapter.c123 static void enable_intr_wrapper(uint32_t intr_mask) in enable_intr_wrapper() argument
125 esprv_intc_int_enable(intr_mask); in enable_intr_wrapper()
128 static void disable_intr_wrapper(uint32_t intr_mask) in disable_intr_wrapper() argument
130 esprv_intc_int_disable(intr_mask); in disable_intr_wrapper()
/hal_espressif-latest/components/esp_wifi/esp32c3/
Desp_adapter.c126 static void enable_intr_wrapper(uint32_t intr_mask) in enable_intr_wrapper() argument
128 esprv_intc_int_enable(intr_mask); in enable_intr_wrapper()
131 static void disable_intr_wrapper(uint32_t intr_mask) in disable_intr_wrapper() argument
133 esprv_intc_int_disable(intr_mask); in disable_intr_wrapper()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dtwai_ll.h440 static inline void twai_ll_set_enabled_intrs(twai_dev_t *hw, uint32_t intr_mask) in twai_ll_set_enabled_intrs() argument
444 hw->interrupt_enable_reg.val = (hw->interrupt_enable_reg.val & 0x10) | intr_mask; in twai_ll_set_enabled_intrs()
446 hw->interrupt_enable_reg.val = intr_mask; in twai_ll_set_enabled_intrs()

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