Searched refs:enable_w1ts (Results 1 – 22 of 22) sorted by relevance
101 uint32_t enable_w1ts:32; member370 volatile gpio_enable_w1ts_reg_t enable_w1ts; member
105 uint32_t enable_w1ts:25; member384 volatile gpio_enable_w1ts_reg_t enable_w1ts; member
143 uint32_t enable_w1ts:32; member568 volatile gpio_enable_w1ts_reg_t enable_w1ts; member
78 uint32_t enable_w1ts:8; member
286 hw->enable_w1ts.enable_w1ts = (0x1 << gpio_num); in gpio_ll_output_enable()
83 HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_enable_w1ts, enable_w1ts, BIT(rtcio_num)); in rtcio_ll_output_enable()
57 uint32_t enable_w1ts; /*GPIO0~31 output enable write 1 to set*/ member
58 } enable_w1ts; member
269 hw->enable_w1ts.enable_w1ts = (0x1 << gpio_num); in gpio_ll_output_enable()
63 uint32_t enable_w1ts:26; member67 } enable_w1ts; member
278 hw->enable_w1ts.enable_w1ts = (0x1 << gpio_num); in gpio_ll_output_enable()
328 hw->enable_w1ts.enable_w1ts = (0x1 << gpio_num); in gpio_ll_output_enable()
50 uint32_t enable_w1ts; member
48 uint32_t enable_w1ts; /**/ member
49 } enable_w1ts; member
70 RTCIO.enable_w1ts.w1ts = (1U << rtcio_num); in rtcio_ll_output_enable()
278 hw->enable_w1ts = (0x1 << gpio_num); in gpio_ll_output_enable()
67 RTCIO.enable_w1ts.w1ts = (1U << rtcio_num); in rtcio_ll_output_enable()
390 hw->enable_w1ts = (0x1 << gpio_num); in gpio_ll_output_enable()
78 RTCIO.enable_w1ts.w1ts = (1U << rtcio_num); in rtcio_ll_output_enable()
291 hw->enable_w1ts = (0x1 << gpio_num); in gpio_ll_output_enable()
