| /hal_espressif-latest/components/hal/esp32c6/include/hal/ |
| D | sdio_slave_ll.h | 221 static inline void sdio_slave_ll_send_part_done_intr_ena(slc_dev_t *slc, bool ena) in sdio_slave_ll_send_part_done_intr_ena() argument
223 slc->slc0int_ena.slc0_rx_done_int_ena = (ena ? 1 : 0); in sdio_slave_ll_send_part_done_intr_ena()
264 static inline void sdio_slave_ll_send_intr_ena(slc_dev_t *slc, bool ena) in sdio_slave_ll_send_intr_ena() argument
266 slc->slc0int_ena.slc0_rx_eof_int_ena = (ena? 1: 0); in sdio_slave_ll_send_intr_ena()
309 static inline void sdio_slave_ll_recv_intr_ena(slc_dev_t *slc, bool ena) in sdio_slave_ll_recv_intr_ena() argument
311 slc->slc0int_ena.slc0_tx_done_int_ena = (ena ? 1 : 0); in sdio_slave_ll_recv_intr_ena()
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| D | i2s_ll.h | 938 static inline void i2s_ll_tx_enable_left_align(i2s_dev_t *hw, bool ena) in i2s_ll_tx_enable_left_align() argument
940 hw->tx_conf.tx_left_align = ena; in i2s_ll_tx_enable_left_align()
949 static inline void i2s_ll_rx_enable_left_align(i2s_dev_t *hw, bool ena) in i2s_ll_rx_enable_left_align() argument
951 hw->rx_conf.rx_left_align = ena; in i2s_ll_rx_enable_left_align()
960 static inline void i2s_ll_rx_enable_big_endian(i2s_dev_t *hw, bool ena) in i2s_ll_rx_enable_big_endian() argument
962 hw->rx_conf.rx_big_endian = ena; in i2s_ll_rx_enable_big_endian()
971 static inline void i2s_ll_tx_enable_big_endian(i2s_dev_t *hw, bool ena) in i2s_ll_tx_enable_big_endian() argument
973 hw->tx_conf.tx_big_endian = ena; in i2s_ll_tx_enable_big_endian()
1055 static inline void i2s_ll_share_bck_ws(i2s_dev_t *hw, bool ena) in i2s_ll_share_bck_ws() argument
1057 hw->tx_conf.sig_loopback = ena; in i2s_ll_share_bck_ws()
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| D | gdma_ll.h | 116 dev->in_intr[channel].ena.val |= (mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_enable_interrupt()
118 dev->in_intr[channel].ena.val &= ~(mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_enable_interrupt()
340 dev->out_intr[channel].ena.val |= (mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_enable_interrupt()
342 dev->out_intr[channel].ena.val &= ~(mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_enable_interrupt()
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| /hal_espressif-latest/components/hal/esp32/include/hal/ |
| D | sdio_slave_ll.h | 221 static inline void sdio_slave_ll_send_part_done_intr_ena(slc_dev_t *slc, bool ena) in sdio_slave_ll_send_part_done_intr_ena() argument
223 slc->slc0_int_ena.rx_done = (ena ? 1 : 0); in sdio_slave_ll_send_part_done_intr_ena()
264 static inline void sdio_slave_ll_send_intr_ena(slc_dev_t *slc, bool ena) in sdio_slave_ll_send_intr_ena() argument
266 slc->slc0_int_ena.rx_eof = (ena? 1: 0); in sdio_slave_ll_send_intr_ena()
309 static inline void sdio_slave_ll_recv_intr_ena(slc_dev_t *slc, bool ena) in sdio_slave_ll_recv_intr_ena() argument
311 slc->slc0_int_ena.tx_done = (ena ? 1 : 0); in sdio_slave_ll_recv_intr_ena()
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| D | brownout_ll.h | 73 RTCCNTL.brown_out.ena = bod_enable; in brownout_ll_bod_enable()
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| D | i2s_ll.h | 674 static inline void i2s_ll_enable_dma(i2s_dev_t *hw, bool ena) in i2s_ll_enable_dma() argument
676 hw->fifo_conf.dscr_en = ena; in i2s_ll_enable_dma()
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| /hal_espressif-latest/components/hal/esp32s3/include/hal/ |
| D | i2s_ll.h | 946 static inline void i2s_ll_tx_enable_left_align(i2s_dev_t *hw, bool ena) in i2s_ll_tx_enable_left_align() argument
948 hw->tx_conf.tx_left_align = ena; in i2s_ll_tx_enable_left_align()
957 static inline void i2s_ll_rx_enable_left_align(i2s_dev_t *hw, bool ena) in i2s_ll_rx_enable_left_align() argument
959 hw->rx_conf.rx_left_align = ena; in i2s_ll_rx_enable_left_align()
968 static inline void i2s_ll_rx_enable_big_endian(i2s_dev_t *hw, bool ena) in i2s_ll_rx_enable_big_endian() argument
970 hw->rx_conf.rx_big_endian = ena; in i2s_ll_rx_enable_big_endian()
979 static inline void i2s_ll_tx_enable_big_endian(i2s_dev_t *hw, bool ena) in i2s_ll_tx_enable_big_endian() argument
981 hw->tx_conf.tx_big_endian = ena; in i2s_ll_tx_enable_big_endian()
1063 static inline void i2s_ll_share_bck_ws(i2s_dev_t *hw, bool ena) in i2s_ll_share_bck_ws() argument
1065 hw->tx_conf.sig_loopback = ena; in i2s_ll_share_bck_ws()
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| D | brownout_ll.h | 76 RTCCNTL.brown_out.ena = bod_enable; in brownout_ll_bod_enable()
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| /hal_espressif-latest/components/hal/esp32c3/include/hal/ |
| D | i2s_ll.h | 925 static inline void i2s_ll_tx_enable_left_align(i2s_dev_t *hw, bool ena) in i2s_ll_tx_enable_left_align() argument
927 hw->tx_conf.tx_left_align = ena; in i2s_ll_tx_enable_left_align()
936 static inline void i2s_ll_rx_enable_left_align(i2s_dev_t *hw, bool ena) in i2s_ll_rx_enable_left_align() argument
938 hw->rx_conf.rx_left_align = ena; in i2s_ll_rx_enable_left_align()
947 static inline void i2s_ll_rx_enable_big_endian(i2s_dev_t *hw, bool ena) in i2s_ll_rx_enable_big_endian() argument
949 hw->rx_conf.rx_big_endian = ena; in i2s_ll_rx_enable_big_endian()
958 static inline void i2s_ll_tx_enable_big_endian(i2s_dev_t *hw, bool ena) in i2s_ll_tx_enable_big_endian() argument
960 hw->tx_conf.tx_big_endian = ena; in i2s_ll_tx_enable_big_endian()
1042 static inline void i2s_ll_share_bck_ws(i2s_dev_t *hw, bool ena) in i2s_ll_share_bck_ws() argument
1044 hw->tx_conf.sig_loopback = ena; in i2s_ll_share_bck_ws()
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| D | gdma_ll.h | 69 dev->intr[channel].ena.val |= (mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_enable_interrupt()
71 dev->intr[channel].ena.val &= ~(mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_enable_interrupt()
283 dev->intr[channel].ena.val |= (mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_enable_interrupt()
285 dev->intr[channel].ena.val &= ~(mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_enable_interrupt()
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| D | brownout_ll.h | 76 RTCCNTL.brown_out.ena = bod_enable; in brownout_ll_bod_enable()
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| /hal_espressif-latest/components/hal/esp32h2/include/hal/ |
| D | i2s_ll.h | 945 static inline void i2s_ll_tx_enable_left_align(i2s_dev_t *hw, bool ena) in i2s_ll_tx_enable_left_align() argument
947 hw->tx_conf.tx_left_align = ena; in i2s_ll_tx_enable_left_align()
956 static inline void i2s_ll_rx_enable_left_align(i2s_dev_t *hw, bool ena) in i2s_ll_rx_enable_left_align() argument
958 hw->rx_conf.rx_left_align = ena; in i2s_ll_rx_enable_left_align()
967 static inline void i2s_ll_rx_enable_big_endian(i2s_dev_t *hw, bool ena) in i2s_ll_rx_enable_big_endian() argument
969 hw->rx_conf.rx_big_endian = ena; in i2s_ll_rx_enable_big_endian()
978 static inline void i2s_ll_tx_enable_big_endian(i2s_dev_t *hw, bool ena) in i2s_ll_tx_enable_big_endian() argument
980 hw->tx_conf.tx_big_endian = ena; in i2s_ll_tx_enable_big_endian()
1062 static inline void i2s_ll_share_bck_ws(i2s_dev_t *hw, bool ena) in i2s_ll_share_bck_ws() argument
1064 hw->tx_conf.sig_loopback = ena; in i2s_ll_share_bck_ws()
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| D | gdma_ll.h | 116 dev->in_intr[channel].ena.val |= (mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_enable_interrupt()
118 dev->in_intr[channel].ena.val &= ~(mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_enable_interrupt()
340 dev->out_intr[channel].ena.val |= (mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_enable_interrupt()
342 dev->out_intr[channel].ena.val &= ~(mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_enable_interrupt()
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| /hal_espressif-latest/zephyr/port/wifi/ |
| D | wifi_init.c | 68 # define WIFI_BEACON_MONITOR_CONFIG_DEFAULT(ena) { \ argument
69 .enable = (ena), \
81 # define WIFI_BEACON_MONITOR_CONFIG_DEFAULT(ena) { \ argument
82 .enable = (ena), \
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| /hal_espressif-latest/components/esp_system/port/include/private/esp_private/ |
| D | trax.h | 43 int trax_enable(trax_ena_select_t ena);
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| /hal_espressif-latest/components/esp_wifi/src/ |
| D | wifi_init.c | 60 # define WIFI_BEACON_MONITOR_CONFIG_DEFAULT(ena) { \ argument
61 .enable = (ena), \
73 # define WIFI_BEACON_MONITOR_CONFIG_DEFAULT(ena) { \ argument
74 .enable = (ena), \
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| /hal_espressif-latest/components/hal/esp32c2/include/hal/ |
| D | gdma_ll.h | 69 dev->intr[channel].ena.val |= (mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_enable_interrupt()
71 dev->intr[channel].ena.val &= ~(mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_enable_interrupt()
283 dev->intr[channel].ena.val |= (mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_enable_interrupt()
285 dev->intr[channel].ena.val &= ~(mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_enable_interrupt()
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| D | brownout_ll.h | 76 RTCCNTL.brown_out.ena = bod_enable; in brownout_ll_bod_enable()
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| /hal_espressif-latest/components/hal/esp32s2/include/hal/ |
| D | brownout_ll.h | 77 RTCCNTL.brown_out.ena = bod_enable; in brownout_ll_bod_enable()
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| D | i2s_ll.h | 675 static inline void i2s_ll_enable_dma(i2s_dev_t *hw, bool ena) in i2s_ll_enable_dma() argument
677 hw->fifo_conf.dscr_en = ena; in i2s_ll_enable_dma()
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| /hal_espressif-latest/components/soc/esp32c6/include/soc/ |
| D | gdma_struct.h | 926 volatile gdma_in_int_ena_chn_reg_t ena; member
933 volatile gdma_out_int_ena_chn_reg_t ena; member
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| /hal_espressif-latest/components/soc/esp32h2/include/soc/ |
| D | gdma_struct.h | 926 volatile gdma_in_int_ena_chn_reg_t ena; member
933 volatile gdma_out_int_ena_chn_reg_t ena; member
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| /hal_espressif-latest/components/esp_rom/include/esp32s3/rom/ |
| D | cache.h | 144 uint8_t ena; /*!< autoload enable */ member
152 uint8_t ena; /*!< autoload region enable */ member
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| /hal_espressif-latest/components/soc/esp32c2/include/soc/ |
| D | gdma_struct.h | 72 } ena; member
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| /hal_espressif-latest/components/soc/esp32c3/include/soc/ |
| D | gdma_struct.h | 72 } ena; member
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