| /hal_espressif-latest/components/hal/esp32s3/include/hal/ |
| D | sdmmc_ll.h | 63 hw->clock.clk_sel = clk_val; in sdmmc_ll_select_clk_source()
88 hw->clock.div_factor_h = h; in sdmmc_ll_set_clock_div()
89 hw->clock.div_factor_l = l; in sdmmc_ll_set_clock_div()
90 hw->clock.div_factor_n = l; in sdmmc_ll_set_clock_div()
100 hw->clock.val = 0; in sdmmc_ll_deinit_clk()
112 return hw->clock.div_factor_l + 1; in sdmmc_ll_get_clock_div()
122 hw->clock.phase_core = 0; in sdmmc_ll_init_phase_delay()
127 hw->clock.phase_dout = 1; in sdmmc_ll_init_phase_delay()
128 hw->clock.phase_din = 0; in sdmmc_ll_init_phase_delay()
141 hw->clock.phase_din = 0x1; in sdmmc_ll_set_din_delay()
[all …]
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| /hal_espressif-latest/components/hal/esp32/include/hal/ |
| D | sdmmc_ll.h | 111 hw->clock.div_factor_h = h; in sdmmc_ll_set_clock_div()
112 hw->clock.div_factor_l = l; in sdmmc_ll_set_clock_div()
113 hw->clock.div_factor_n = h; in sdmmc_ll_set_clock_div()
123 hw->clock.val = 0; in sdmmc_ll_deinit_clk()
135 return hw->clock.div_factor_h + 1; in sdmmc_ll_get_clock_div()
146 hw->clock.phase_dout = 4; in sdmmc_ll_init_phase_delay()
147 hw->clock.phase_din = 4; in sdmmc_ll_init_phase_delay()
148 hw->clock.phase_core = 0; in sdmmc_ll_init_phase_delay()
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| /hal_espressif-latest/components/esp_hw_support/port/esp32h2/ |
| D | Kconfig.rtc | 2 prompt "RTC clock source"
5 Choose which clock is used as RTC clock source.
31 When this option is set to 0, clock calibration will not be performed at
32 startup, and approximate clock frequencies will be assumed:
34 - 136000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
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| D | pmu_init.c | 25 const pmu_hp_system_clock_param_t *clock; member
49 const pmu_hp_system_clock_param_t *clock = param->clock; in pmu_hp_system_init() local
61 pmu_ll_hp_set_icg_func (ctx->hal->dev, mode, clock->icg_func); in pmu_hp_system_init()
62 pmu_ll_hp_set_icg_apb (ctx->hal->dev, mode, clock->icg_apb); in pmu_hp_system_init()
63 pmu_ll_hp_set_icg_modem (ctx->hal->dev, mode, clock->icg_modem.code); in pmu_hp_system_init()
64 pmu_ll_hp_set_sysclk_nodiv (ctx->hal->dev, mode, clock->sysclk.dig_sysclk_nodiv); in pmu_hp_system_init()
65 pmu_ll_hp_set_icg_sysclk_enable (ctx->hal->dev, mode, clock->sysclk.icg_sysclk_en); in pmu_hp_system_init()
66 pmu_ll_hp_set_sysclk_slp_sel (ctx->hal->dev, mode, clock->sysclk.sysclk_slp_sel); in pmu_hp_system_init()
67 pmu_ll_hp_set_icg_sysclk_slp_sel(ctx->hal->dev, mode, clock->sysclk.icg_slp_sel); in pmu_hp_system_init()
68 pmu_ll_hp_set_dig_sysclk (ctx->hal->dev, mode, clock->sysclk.dig_sysclk_sel); in pmu_hp_system_init()
[all …]
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| /hal_espressif-latest/components/esp_hw_support/port/esp32s3/ |
| D | Kconfig.rtc | 2 prompt "RTC clock source"
5 Choose which clock is used as RTC clock source.
33 When this option is set to 0, clock calibration will not be performed at
34 startup, and approximate clock frequencies will be assumed:
36 - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
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| /hal_espressif-latest/components/esp_hw_support/port/esp32c2/ |
| D | Kconfig.rtc | 2 prompt "RTC clock source"
5 Choose which clock is used as RTC clock source.
29 When this option is set to 0, clock calibration will not be performed at
30 startup, and approximate clock frequencies will be assumed:
32 - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
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| /hal_espressif-latest/components/esp_hw_support/port/esp32c3/ |
| D | Kconfig.rtc | 2 prompt "RTC clock source"
5 Choose which clock is used as RTC clock source.
33 When this option is set to 0, clock calibration will not be performed at
34 startup, and approximate clock frequencies will be assumed:
36 - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
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| /hal_espressif-latest/components/esp_hw_support/port/esp32c6/ |
| D | Kconfig.rtc | 2 prompt "RTC clock source"
5 Choose which clock is used as RTC clock source.
26 Internal RC32K clock is unstable at extreme temperatures and is not recommended for use.
42 When this option is set to 0, clock calibration will not be performed at
43 startup, and approximate clock frequencies will be assumed:
45 - 136000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
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| D | pmu_init.c | 24 const pmu_hp_system_clock_param_t *clock; member
48 const pmu_hp_system_clock_param_t *clock = param->clock; in pmu_hp_system_init() local
60 pmu_ll_hp_set_icg_func (ctx->hal->dev, mode, clock->icg_func); in pmu_hp_system_init()
61 pmu_ll_hp_set_icg_apb (ctx->hal->dev, mode, clock->icg_apb); in pmu_hp_system_init()
62 pmu_ll_hp_set_icg_modem (ctx->hal->dev, mode, clock->icg_modem.code); in pmu_hp_system_init()
63 pmu_ll_hp_set_sysclk_nodiv (ctx->hal->dev, mode, clock->sysclk.dig_sysclk_nodiv); in pmu_hp_system_init()
64 pmu_ll_hp_set_icg_sysclk_enable (ctx->hal->dev, mode, clock->sysclk.icg_sysclk_en); in pmu_hp_system_init()
65 pmu_ll_hp_set_sysclk_slp_sel (ctx->hal->dev, mode, clock->sysclk.sysclk_slp_sel); in pmu_hp_system_init()
66 pmu_ll_hp_set_icg_sysclk_slp_sel(ctx->hal->dev, mode, clock->sysclk.icg_slp_sel); in pmu_hp_system_init()
67 pmu_ll_hp_set_dig_sysclk (ctx->hal->dev, mode, clock->sysclk.dig_sysclk_sel); in pmu_hp_system_init()
[all …]
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| /hal_espressif-latest/components/esp_hw_support/port/esp32s2/ |
| D | Kconfig.rtc | 2 prompt "RTC clock source"
5 Choose which clock is used as RTC clock source.
13 - "External 32kHz oscillator" allows using 32kHz clock generated by an
14 external circuit. In this case, external clock signal must be connected
48 When this option is set to 0, clock calibration will not be performed at
49 startup, and approximate clock frequencies will be assumed:
51 - 90000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
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| /hal_espressif-latest/components/esp_psram/esp32s2/ |
| D | Kconfig.spiram | 71 prompt "Set RAM clock speed"
77 bool "80MHz clock speed"
79 bool "40Mhz clock speed"
81 bool "26Mhz clock speed"
83 bool "20Mhz clock speed"
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| /hal_espressif-latest/components/esp_hw_support/port/esp32/ |
| D | Kconfig.rtc | 2 prompt "RTC clock source"
5 Choose which clock is used as RTC clock source.
13 - "External 32kHz oscillator" allows using 32kHz clock generated by an
14 external circuit. In this case, external clock signal must be connected
80 When this option is set to 0, clock calibration will not be performed at
81 startup, and approximate clock frequencies will be assumed:
83 - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
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| /hal_espressif-latest/tools/esptool_py/docs/en/advanced-topics/ |
| D | spi-flash-modes.rst | 48 The maximum data rate for normal SPI is the clock rate in bits - so a 40MHz clock = 40Mbits/sec = 5…
53 …pins are both used to read or write data simultaneously with two bits per clock cycle. This double…
55 … then the host reads the data via both the MOSI & MISO pins simultaneously with two bits per clock.
58 …t then the address is sent to the flash chip via both the MOSI & MISO pins with two bits per clock.
59 After this, the host reads the data bits with two bits per clock in the same way as "Dual Output Fa…
72 …tput Fast Read", only data is read on 4 pins instead of 2 with 4 bits per clock cycle. This makes …
74 …Read", only both address & data are transferred on 4 pins instead of 2 with 4 bits per clock cycle.
102 …stest SPI Flash clock rate that works reliably on your board/module. An 80MHz SPI clock in Dual I/…
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| D | boot-mode-selection.rst | 318 mode:DIO, clock div:1
326 mode:DIO, clock div:1
342 …- ``mode: AAA, clock div: N``. SPI flash access mode. Read from the bootloader header, correspond…
344 …- ``clock div: N`` is the SPI flash clock frequency divider. This is an integer clock divider val…
345 …ash_freq value. The initial APB clock frequency is equal to the crystal frequency, so with a 40MHz…
346 …When the software bootloader starts it sets the APB clock to 80MHz causing the SPI clock frequency…
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| /hal_espressif-latest/components/esp_psram/esp32s3/ |
| D | Kconfig.spiram | 79 prompt "Set RAM clock speed"
86 bool "120MHz clock speed"
100 bool "80MHz clock speed"
102 bool "40Mhz clock speed"
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| /hal_espressif-latest/components/bt/controller/esp32/ |
| D | Kconfig.in | 229 bool "ORIG Mode(sleep with low power clock)"
232 … bluetooth controller sleeps between BR/EDR frames and BLE events. A low power clock is used to
233 maintain bluetooth reference clock.
243 prompt "Bluetooth low power clock"
246 Select the low power clock source for bluetooth controller. Bluetooth low power clock is
247 the clock source to maintain time in sleep mode.
252 power clock. This option is allowed as long as External 32kHz crystal is configured as
253 the system RTC clock source. This option provides good accuracy and supports Bluetooth
259 … Main crystal can be used as low power clock for bluetooth modem sleep. If this option is
262 the bluetooth low power clock source.
[all …]
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| /hal_espressif-latest/components/esp_rom/include/esp32s2/rom/ |
| D | uart.h | 177 void Uart_Init(uint8_t uart_no, uint32_t clock);
203 void uart_div_reinit(uint8_t uart_no, uint32_t clock);
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| /hal_espressif-latest/components/esp_rom/esp32c6/ld/ |
| D | esp32c6.rom.wdt.ld | 12 /* Patch init function to set clock source
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| /hal_espressif-latest/components/esp_rom/esp32h2/ld/ |
| D | esp32h2.rom.wdt.ld | 12 /* Patch init function to set clock source
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| /hal_espressif-latest/components/bt/controller/esp32c3/ |
| D | Kconfig.in | 390 power clock is used to maintain bluetooth reference clock.
393 prompt "Bluetooth low power clock"
396 Select the low power clock source for bluetooth controller
401 … Main crystal can be used as low power clock for bluetooth modem sleep. If this option is
404 than other bluetooth low power clock sources.
410 … stability. If used as Bluetooth low power clock, External 32kHz can support Bluetooth
417 …Internal 150kHz RC oscillator. The accuracy of this clock is a lot larger than 500ppm which is req…
426 …this option is selected, the main crystal will power up during light sleep when the low power clock
427 …ects an external 32kHz crystal but the external 32kHz crystal does not exist or the low power clock
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| /hal_espressif-latest/components/esp_rom/include/esp32c2/rom/ |
| D | efuse.h | 48 int ets_efuse_set_timing(uint32_t clock);
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| /hal_espressif-latest/components/hal/esp32h2/include/hal/ |
| D | gpspi_flash_ll.h | 35 typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t;
248 dev->clock.val = *clock_val; in gpspi_flash_ll_set_clock()
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| /hal_espressif-latest/components/bt/controller/esp32c2/ |
| D | Kconfig.in | 420 int "BLE Sleep clock accuracy"
424 Sleep clock accuracy of our device (in ppm)
470 prompt "BLE low power clock source"
473 bool "Use main XTAL as RTC clock source"
475 User main XTAL as RTC clock source.
481 bool "Use system RTC slow clock source"
483 Use the same slow clock source as system RTC
484 Using any clock source other than external 32.768 kHz XTAL at pin0 supports only
485 legacy ADV and SCAN due to low clock accuracy.
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| /hal_espressif-latest/components/esp_rom/include/esp32c3/rom/ |
| D | efuse.h | 64 int ets_efuse_set_timing(uint32_t clock);
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| /hal_espressif-latest/components/esp_rom/include/esp32s3/rom/ |
| D | efuse.h | 65 int ets_efuse_set_timing(uint32_t clock);
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