Searched refs:clkm_conf (Results 1 – 4 of 4) sorted by relevance
98 if (hw->clkm_conf.clk_en == 0) { in i2s_ll_enable_clock()99 hw->clkm_conf.clk_sel = 2; in i2s_ll_enable_clock()100 hw->clkm_conf.clk_en = 1; in i2s_ll_enable_clock()112 if (hw->clkm_conf.clk_en == 1) { in i2s_ll_disable_clock()113 hw->clkm_conf.clk_en = 0; in i2s_ll_disable_clock()257 hw->clkm_conf.clk_sel = (src == I2S_CLK_SRC_APLL) ? 1 : 2; in i2s_ll_tx_clk_set_src()268 hw->clkm_conf.clk_sel = (src == I2S_CLK_SRC_APLL) ? 1 : 2; in i2s_ll_rx_clk_set_src()294 HAL_FORCE_MODIFY_U32_REG_FIELD(hw->clkm_conf, clkm_div_num, mclk_div); in i2s_ll_set_raw_mclk_div()295 hw->clkm_conf.clkm_div_b = b; in i2s_ll_set_raw_mclk_div()296 hw->clkm_conf.clkm_div_a = a; in i2s_ll_set_raw_mclk_div()
101 if (hw->clkm_conf.clk_en == 0) { in i2s_ll_enable_clock()102 hw->clkm_conf.clk_en = 1; in i2s_ll_enable_clock()114 if (hw->clkm_conf.clk_en == 1) { in i2s_ll_disable_clock()115 hw->clkm_conf.clk_en = 0; in i2s_ll_disable_clock()264 hw->clkm_conf.clka_en = (src == I2S_CLK_SRC_APLL) ? 1 : 0; in i2s_ll_tx_clk_set_src()277 hw->clkm_conf.clka_en = (src == I2S_CLK_SRC_APLL) ? 1 : 0; in i2s_ll_rx_clk_set_src()303 HAL_FORCE_MODIFY_U32_REG_FIELD(hw->clkm_conf, clkm_div_num, mclk_div); in i2s_ll_set_raw_mclk_div()304 hw->clkm_conf.clkm_div_b = b; in i2s_ll_set_raw_mclk_div()305 hw->clkm_conf.clkm_div_a = a; in i2s_ll_set_raw_mclk_div()
368 } clkm_conf; member
393 } clkm_conf; member
