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Searched refs:UART_SCLK_DEFAULT (Results 1 – 10 of 10) sorted by relevance

/hal_espressif-latest/components/bt/porting/transport/driver/uart/
Dhci_driver_uart_config.c26 uart_cfg->source_clk= UART_SCLK_DEFAULT; in hci_driver_uart_config()
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dclk_tree_defs.h185 UART_SCLK_DEFAULT = SOC_MOD_CLK_PLL_F40M, /*!< UART source clock default choice is PLL_F40M */ enumerator
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dclk_tree_defs.h211 UART_SCLK_DEFAULT = SOC_MOD_CLK_APB, /*!< UART source clock default choice is APB */ enumerator
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dclk_tree_defs.h226 UART_SCLK_DEFAULT = SOC_MOD_CLK_APB, /*!< UART source clock default choice is APB */ enumerator
/hal_espressif-latest/components/soc/esp32/include/soc/
Dclk_tree_defs.h211 UART_SCLK_DEFAULT = SOC_MOD_CLK_APB, /*!< UART source clock default choice is APB */ enumerator
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dclk_tree_defs.h245 UART_SCLK_DEFAULT = SOC_MOD_CLK_APB, /*!< UART source clock default choice is APB */ enumerator
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dclk_tree_defs.h227 …UART_SCLK_DEFAULT = SOC_MOD_CLK_PLL_F80M, /*!< UART source clock default choice is PLL_F… enumerator
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dclk_tree_defs.h234 …UART_SCLK_DEFAULT = SOC_MOD_CLK_PLL_F48M, /*!< UART source clock default choice is PLL_F48M */ enumerator
/hal_espressif-latest/components/esp_pm/
Dpm_impl.c569 uart_sclk_t clk_source = UART_SCLK_DEFAULT; in esp_pm_impl_init()
/hal_espressif-latest/components/driver/uart/
Duart.c684 …uart_sclk_t clk_src = (uart_config->source_clk) ? uart_config->source_clk : UART_SCLK_DEFAULT; // … in uart_param_config()