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Searched refs:UART_CLKDIV_REG (Results 1 – 13 of 13) sorted by relevance

/hal_espressif-latest/tools/esptool_py/esptool/targets/
Desp8266.py31 UART_CLKDIV_REG = 0x60000014 variable in ESP8266ROM
Desp32c3.py40 UART_CLKDIV_REG = 0x60000014 variable in ESP32C3ROM
Desp32s2.py39 UART_CLKDIV_REG = 0x3F400014 variable in ESP32S2ROM
Desp32.py65 UART_CLKDIV_REG = 0x3FF40014 variable in ESP32ROM
Desp32s3.py105 UART_CLKDIV_REG = 0x60000014 variable in ESP32S3ROM
/hal_espressif-latest/tools/esptool_py/flasher_stub/
Dstub_io.c288 uint32_t uart_reg = READ_REG(UART_CLKDIV_REG(0)); in get_new_uart_divider()
/hal_espressif-latest/tools/esptool_py/flasher_stub/include/
Dsoc_support.h215 #define UART_CLKDIV_REG(X) (UART_BASE_REG + 0x14) macro
/hal_espressif-latest/components/soc/esp32/include/soc/
Duart_reg.h525 #define UART_CLKDIV_REG(i) (REG_UART_BASE(i) + 0x14) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Duart_reg.h518 #define UART_CLKDIV_REG(i) (REG_UART_BASE(i) + 0x14) macro
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Duart_reg.h544 #define UART_CLKDIV_REG(i) (REG_UART_BASE(i) + 0x14) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Duart_reg.h551 #define UART_CLKDIV_REG(i) (REG_UART_BASE(i) + 0x14) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Duart_reg.h643 #define UART_CLKDIV_REG(i) (REG_UART_BASE(i) + 0x14) macro
/hal_espressif-latest/tools/esptool_py/esptool/
Dloader.py1512 uart_div = self.read_reg(self.UART_CLKDIV_REG) & self.UART_CLKDIV_MASK