Searched refs:SYSCON_SARADC_FSM_REG (Results 1 – 3 of 3) sorted by relevance
| /hal_espressif-latest/zephyr/esp32/src/ |
| D | soc_random.c | 54 SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_RSTB_WAIT, 8, in soc_random_enable()
56 SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_START_WAIT, 10, in soc_random_enable()
99 SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_START_WAIT, 8, in soc_random_disable()
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| /hal_espressif-latest/components/bootloader_support/src/ |
| D | bootloader_random_esp32.c | 63 …SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_RSTB_WAIT, 8, SYSCON_SARADC_RSTB_WAIT_S); /… in bootloader_random_enable()
64 …SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_START_WAIT, 10, SYSCON_SARADC_START_WAIT_S); in bootloader_random_enable()
107 … SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_START_WAIT, 8, SYSCON_SARADC_START_WAIT_S); in bootloader_random_disable()
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| /hal_espressif-latest/components/soc/esp32/include/soc/ |
| D | syscon_reg.h | 183 #define SYSCON_SARADC_FSM_REG (DR_REG_SYSCON_BASE + 0x18) macro
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