Home
last modified time | relevance | path

Searched refs:SOC_MOD_CLK_PLL_F96M (Results 1 – 3 of 3) sorted by relevance

/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dclk_tree_defs.h132SOC_MOD_CLK_PLL_F96M, /*!< PLL_F96M_CLK is derived from PLL (clock gating), i… enumerator
242 #define SOC_MCPWM_TIMER_CLKS {SOC_MOD_CLK_PLL_F96M, SOC_MOD_CLK_XTAL}
248 MCPWM_TIMER_CLK_SRC_PLL96M = SOC_MOD_CLK_PLL_F96M, /*!< Select PLL_F96M as the source clock */
250 …MCPWM_TIMER_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F96M, /*!< Select PLL_F96M as the default clock cho…
256 #define SOC_MCPWM_CAPTURE_CLKS {SOC_MOD_CLK_PLL_F96M, SOC_MOD_CLK_XTAL}
262 … MCPWM_CAPTURE_CLK_SRC_PLL96M = SOC_MOD_CLK_PLL_F96M, /*!< Select PLL_F96M as the source clock */
264 …MCPWM_CAPTURE_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F96M, /*!< Select PLL_F96M as the default clock c…
270 #define SOC_MCPWM_CARRIER_CLKS {SOC_MOD_CLK_PLL_F96M, SOC_MOD_CLK_XTAL}
276 … MCPWM_CARRIER_CLK_SRC_PLL96M = SOC_MOD_CLK_PLL_F96M, /*!< Select PLL_F96M as the source clock */
278 …MCPWM_CARRIER_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F96M, /*!< Select PLL_F96M as the default clock c…
[all …]
/hal_espressif-latest/components/esp_hw_support/port/esp32h2/
Desp_clk_tree.c39 case SOC_MOD_CLK_PLL_F96M: in esp_clk_tree_src_get_freq_hz()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dmcpwm_ll.h83 case SOC_MOD_CLK_PLL_F96M: in mcpwm_ll_group_set_clock_source()