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Searched refs:SOC_MOD_CLK_PLL_F240M (Results 1 – 2 of 2) sorted by relevance

/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dclk_tree_defs.h120 …SOC_MOD_CLK_PLL_F240M, /*!< PLL_F240M_CLK is derived from PLL (clock gating + … enumerator
455 #define SOC_PARLIO_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_PLL_F240M}
462 PARLIO_CLK_SRC_PLL_F240M = SOC_MOD_CLK_PLL_F240M, /*!< Select PLL_F240M as the source clock */
463 …PARLIO_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F240M, /*!< Select PLL_F240M as the default clock choic…
/hal_espressif-latest/components/esp_hw_support/port/esp32c6/
Desp_clk_tree.c39 case SOC_MOD_CLK_PLL_F240M: in esp_clk_tree_src_get_freq_hz()