Searched refs:SIZE (Results 1 – 3 of 3) sorted by relevance
| /hal_espressif-latest/components/riscv/include/riscv/ |
| D | csr.h | 77 #define PMA_ENTRY_SET_NAPOT(ENTRY, ADDR, SIZE, CFG) \ argument
79 ESP_STATIC_ASSERT(__builtin_popcount((SIZE)) == 1, "Size must be a power of 2"); \
80 ESP_STATIC_ASSERT((ADDR) % ((SIZE)) == 0, "Addr must be aligned to size"); \
81 RV_WRITE_CSR((CSR_PMAADDR0) + (ENTRY), ((ADDR) | ((SIZE >> 1) - 1)) >> 2); \
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| /hal_espressif-latest/components/spi_flash/ |
| D | esp_flash_api.c | 53 #define CHECK_WRITE_ADDRESS(CHIP, ADDR, SIZE) argument
55 #define CHECK_WRITE_ADDRESS(CHIP, ADDR, SIZE) do { \ argument
56 …on_protected && CHIP->os_func->region_protected(CHIP->os_func_data, ADDR, SIZE)) { …
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| /hal_espressif-latest/tools/esptool_py/docs/en/esptool/ |
| D | basic-commands.rst | 306 * The ``--fill-flash-size SIZE`` option will pad the merged binary with `0xFF` bytes to the full f…
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