Searched refs:SENS_SAR_MEAS_WAIT2_REG (Results 1 – 3 of 3) sorted by relevance
| /hal_espressif-latest/zephyr/esp32/src/ |
| D | soc_random.c | 47 SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 3, SENS_FORCE_XPD_SAR_S); in soc_random_enable()
97 SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 0, SENS_FORCE_XPD_SAR_S); in soc_random_disable()
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| /hal_espressif-latest/components/bootloader_support/src/ |
| D | bootloader_random_esp32.c | 57 SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 3, SENS_FORCE_XPD_SAR_S); in bootloader_random_enable()
105 SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 0, SENS_FORCE_XPD_SAR_S); in bootloader_random_disable()
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| /hal_espressif-latest/components/soc/esp32/include/soc/ |
| D | sens_reg.h | 86 #define SENS_SAR_MEAS_WAIT2_REG (DR_REG_SENS_BASE + 0x000c) macro
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