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Searched refs:RTC_XTAL_FREQ_REG (Results 1 – 14 of 14) sorted by relevance

/hal_espressif-latest/components/esp_system/
Dfpga_overrides.c55 REG_WRITE(RTC_XTAL_FREQ_REG, (xtal_freq_mhz) | ((xtal_freq_mhz) << 16)); in bootloader_clock_configure()
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dclk_tree_ll.h519 uint32_t reg = READ_PERI_REG(RTC_XTAL_FREQ_REG) & RTC_DISABLE_ROM_LOG; in clk_ll_xtal_store_freq_mhz()
524 …WRITE_PERI_REG(RTC_XTAL_FREQ_REG, (xtal_freq_mhz & UINT16_MAX) | ((xtal_freq_mhz & UINT16_MAX) << … in clk_ll_xtal_store_freq_mhz()
538 uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG); in clk_ll_xtal_load_freq_mhz()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dclk_tree_ll.h692 uint32_t reg = READ_PERI_REG(RTC_XTAL_FREQ_REG) & RTC_DISABLE_ROM_LOG; in clk_ll_xtal_store_freq_mhz()
697 …WRITE_PERI_REG(RTC_XTAL_FREQ_REG, (xtal_freq_mhz & UINT16_MAX) | ((xtal_freq_mhz & UINT16_MAX) << … in clk_ll_xtal_store_freq_mhz()
711 uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG); in clk_ll_xtal_load_freq_mhz()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dclk_tree_ll.h629 uint32_t reg = READ_PERI_REG(RTC_XTAL_FREQ_REG) & RTC_DISABLE_ROM_LOG; in clk_ll_xtal_store_freq_mhz()
634 …WRITE_PERI_REG(RTC_XTAL_FREQ_REG, (xtal_freq_mhz & UINT16_MAX) | ((xtal_freq_mhz & UINT16_MAX) << … in clk_ll_xtal_store_freq_mhz()
648 uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG); in clk_ll_xtal_load_freq_mhz()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dclk_tree_ll.h627 uint32_t reg = READ_PERI_REG(RTC_XTAL_FREQ_REG) & RTC_DISABLE_ROM_LOG; in clk_ll_xtal_store_freq_mhz()
632 …WRITE_PERI_REG(RTC_XTAL_FREQ_REG, (xtal_freq_mhz & UINT16_MAX) | ((xtal_freq_mhz & UINT16_MAX) << … in clk_ll_xtal_store_freq_mhz()
646 uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG); in clk_ll_xtal_load_freq_mhz()
/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dclk_tree_ll.h758 uint32_t reg = READ_PERI_REG(RTC_XTAL_FREQ_REG) & RTC_DISABLE_ROM_LOG; in clk_ll_xtal_store_freq_mhz()
763 …WRITE_PERI_REG(RTC_XTAL_FREQ_REG, (xtal_freq_mhz & UINT16_MAX) | ((xtal_freq_mhz & UINT16_MAX) << … in clk_ll_xtal_store_freq_mhz()
777 uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG); in clk_ll_xtal_load_freq_mhz()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dclk_tree_ll.h811 uint32_t reg = READ_PERI_REG(RTC_XTAL_FREQ_REG) & RTC_DISABLE_ROM_LOG; in clk_ll_xtal_store_freq_mhz()
816 …WRITE_PERI_REG(RTC_XTAL_FREQ_REG, (xtal_freq_mhz & UINT16_MAX) | ((xtal_freq_mhz & UINT16_MAX) << … in clk_ll_xtal_store_freq_mhz()
830 uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG); in clk_ll_xtal_load_freq_mhz()
/hal_espressif-latest/components/esp_rom/include/esp32/rom/
Drtc.h62 #define RTC_XTAL_FREQ_REG RTC_CNTL_STORE4_REG macro
/hal_espressif-latest/components/esp_rom/include/esp32c2/rom/
Drtc.h70 #define RTC_XTAL_FREQ_REG RTC_CNTL_STORE4_REG macro
/hal_espressif-latest/components/esp_rom/include/esp32s2/rom/
Drtc.h62 #define RTC_XTAL_FREQ_REG RTC_CNTL_STORE4_REG macro
/hal_espressif-latest/components/esp_rom/include/esp32c6/rom/
Drtc.h62 #define RTC_XTAL_FREQ_REG LP_AON_STORE4_REG macro
/hal_espressif-latest/components/esp_rom/include/esp32h2/rom/
Drtc.h61 #define RTC_XTAL_FREQ_REG LP_AON_STORE4_REG macro
/hal_espressif-latest/components/esp_rom/include/esp32s3/rom/
Drtc.h58 #define RTC_XTAL_FREQ_REG RTC_CNTL_STORE4_REG macro
/hal_espressif-latest/components/esp_rom/include/esp32c3/rom/
Drtc.h62 #define RTC_XTAL_FREQ_REG RTC_CNTL_STORE4_REG macro