Searched refs:RTC_IO_XTAL_32K_PAD_REG (Results 1 – 4 of 4) sorted by relevance
| /hal_espressif-latest/components/hal/esp32/include/hal/ |
| D | clk_tree_ll.h | 238 REG_SET_FIELD(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_DAC_XTAL_32K, dac); in clk_ll_xtal32k_enable()
239 REG_SET_FIELD(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_DRES_XTAL_32K, dres); in clk_ll_xtal32k_enable()
240 REG_SET_FIELD(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_DBIAS_XTAL_32K, dbias); in clk_ll_xtal32k_enable()
242 SET_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_XPD_XTAL_32K_M); in clk_ll_xtal32k_enable()
251 CLEAR_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_XPD_XTAL_32K_M); in clk_ll_xtal32k_disable()
261 return GET_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_XPD_XTAL_32K); in clk_ll_xtal32k_is_enabled()
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| /hal_espressif-latest/components/esp_hw_support/port/esp32/ |
| D | rtc_clk.c | 42 CLEAR_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, in rtc_clk_32k_enable_common()
45 SET_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32N_MUX_SEL | RTC_IO_X32P_MUX_SEL); in rtc_clk_32k_enable_common()
93 CLEAR_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32N_MUX_SEL | RTC_IO_X32P_MUX_SEL); in rtc_clk_32k_enable()
147 SET_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32P_RUE | RTC_IO_X32N_RDE); in rtc_clk_32k_bootstrap()
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| /hal_espressif-latest/components/soc/esp32/ |
| D | rtc_io_periph.c | 63 …{RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32N_MUX_SEL_M, RTC_IO_X32N_FUN_SEL_S, RTC_IO_X32N_FUN_…
64 …{RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32P_MUX_SEL_M, RTC_IO_X32P_FUN_SEL_S, RTC_IO_X32P_FUN_…
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| /hal_espressif-latest/components/soc/esp32/include/soc/ |
| D | rtc_io_reg.h | 924 #define RTC_IO_XTAL_32K_PAD_REG (DR_REG_RTCIO_BASE + 0x8c) macro
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