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Searched refs:RTC_CNTL_ANA_CLK_DIV_VLD (Results 1 – 8 of 8) sorted by relevance

/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dclk_tree_ll.h500 CLEAR_PERI_REG_MASK(RTC_CNTL_SLOW_CLK_CONF_REG, RTC_CNTL_ANA_CLK_DIV_VLD); in clk_ll_rc_slow_set_divider()
502 SET_PERI_REG_MASK(RTC_CNTL_SLOW_CLK_CONF_REG, RTC_CNTL_ANA_CLK_DIV_VLD); in clk_ll_rc_slow_set_divider()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dclk_tree_ll.h610 CLEAR_PERI_REG_MASK(RTC_CNTL_SLOW_CLK_CONF_REG, RTC_CNTL_ANA_CLK_DIV_VLD); in clk_ll_rc_slow_set_divider()
612 SET_PERI_REG_MASK(RTC_CNTL_SLOW_CLK_CONF_REG, RTC_CNTL_ANA_CLK_DIV_VLD); in clk_ll_rc_slow_set_divider()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dclk_tree_ll.h608 CLEAR_PERI_REG_MASK(RTC_CNTL_SLOW_CLK_CONF_REG, RTC_CNTL_ANA_CLK_DIV_VLD); in clk_ll_rc_slow_set_divider()
610 SET_PERI_REG_MASK(RTC_CNTL_SLOW_CLK_CONF_REG, RTC_CNTL_ANA_CLK_DIV_VLD); in clk_ll_rc_slow_set_divider()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dclk_tree_ll.h723 CLEAR_PERI_REG_MASK(RTC_CNTL_SLOW_CLK_CONF_REG, RTC_CNTL_ANA_CLK_DIV_VLD); in clk_ll_rc_slow_set_divider()
725 SET_PERI_REG_MASK(RTC_CNTL_SLOW_CLK_CONF_REG, RTC_CNTL_ANA_CLK_DIV_VLD); in clk_ll_rc_slow_set_divider()
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Drtc_cntl_reg.h786 #define RTC_CNTL_ANA_CLK_DIV_VLD (BIT(22)) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Drtc_cntl_reg.h1117 #define RTC_CNTL_ANA_CLK_DIV_VLD (BIT(22)) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Drtc_cntl_reg.h1322 #define RTC_CNTL_ANA_CLK_DIV_VLD (BIT(22)) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Drtc_cntl_reg.h1426 #define RTC_CNTL_ANA_CLK_DIV_VLD (BIT(22)) macro