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Searched refs:RSR (Results 1 – 2 of 2) sorted by relevance

/hal_espressif-latest/components/xtensa/include/
Dxt_utils.h70 RSR(CCOUNT, ccount); in xt_utils_get_cycle_count()
102 RSR(INTENABLE, intr_mask); in xt_utils_intr_get_enabled_mask()
126 RSR(IBREAKENABLE, brk_ena_reg); in xt_utils_set_breakpoint()
135 RSR(IBREAKENABLE, bp_en); in xt_utils_clear_breakpoint()
Dxt_instr_macros.h11 #define RSR(reg, at) __asm__ volatile ("rsr %0, %1" : "=r" (at) : "i" (reg)) macro