Searched refs:REGDMA_TIMG_LINK (Results 1 – 2 of 2) sorted by relevance
| /hal_espressif-latest/components/esp_hw_support/ |
| D | sleep_system_peripheral.c | 110 …[0] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_TIMG_LINK(0x00), TIMG_WDTWPROTECT_REG(0), TIM… in sleep_sys_periph_tg0_retention_init()
111 …[1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TIMG_LINK(0x01), REG_TIMG_BASE(0), REG… in sleep_sys_periph_tg0_retention_init()
112 …[2] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_TIMG_LINK(0x02), TIMG_WDTWPROTECT_REG(0), TIM… in sleep_sys_periph_tg0_retention_init()
113 …[3] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_TIMG_LINK(0x03), TIMG_WDTCONFIG0_REG(0), TIM… in sleep_sys_periph_tg0_retention_init()
114 …[4] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_TIMG_LINK(0x04), TIMG_T0UPDATE_REG(0), TIM… in sleep_sys_periph_tg0_retention_init()
115 …[5] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_TIMG_LINK(0x05), TIMG_T0UPDATE_REG(0), 0x0… in sleep_sys_periph_tg0_retention_init()
116 …[6] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TIMG_LINK(0x06), TIMG_T0LO_REG(0), TIM… in sleep_sys_periph_tg0_retention_init()
117 …[7] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_TIMG_LINK(0x07), TIMG_T0LOAD_REG(0), 0x1… in sleep_sys_periph_tg0_retention_init()
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| /hal_espressif-latest/components/esp_hw_support/include/esp_private/ |
| D | esp_regdma.h | 39 #define REGDMA_TIMG_LINK(_pri) ((0x11 << 8) | _pri) macro
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