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Searched refs:REG (Results 1 – 5 of 5) sorted by relevance

/hal_espressif-latest/components/soc/esp32/
Ddport_access.c27 : [APB]"=a"(apb), [REG]"+a"(reg), [LVL]"=a"(intLvl)\ in esp_dport_access_reg_read()
45 : [APB]"=a"(apb), [REG]"+a"(reg)\ in esp_dport_access_sequence_reg_read()
/hal_espressif-latest/zephyr/esp32/src/common/
Ddport_access.c22 : [APB] "=a" (apb), [REG] "+a" (reg), [LVL] "=a" (intLvl) \ in esp_dport_access_reg_read()
/hal_espressif-latest/tools/esptool_py/flasher_stub/include/
Dsoc_support.h22 #define READ_REG(REG) (*((volatile uint32_t *)(REG))) argument
23 #define WRITE_REG(REG, VAL) *((volatile uint32_t *)(REG)) = (VAL) argument
/hal_espressif-latest/components/riscv/include/riscv/
Dcsr.h185 #define _CSR_STRINGIFY(REG) #REG /* needed so the 'reg' argument can be a macro or a register name … argument
/hal_espressif-latest/components/esp_system/
Dint_wdt.c138 : [ERI] "=r" (eriadrs), [REG] "+r" (scratch), [IMM] "+r" (immediate) in esp_int_wdt_init()