Searched refs:PMU_IMM_HP_CK_POWER_REG (Results 1 – 4 of 4) sorted by relevance
73 SET_PERI_REG_MASK(PMU_IMM_HP_CK_POWER_REG, PMU_TIE_HIGH_XPD_BB_I2C | in clk_ll_bbpll_enable()75 SET_PERI_REG_MASK(PMU_IMM_HP_CK_POWER_REG, PMU_TIE_HIGH_GLOBAL_BBPLL_ICG); in clk_ll_bbpll_enable()83 SET_PERI_REG_MASK(PMU_IMM_HP_CK_POWER_REG, PMU_TIE_LOW_GLOBAL_BBPLL_ICG) ; in clk_ll_bbpll_disable()84 SET_PERI_REG_MASK(PMU_IMM_HP_CK_POWER_REG, PMU_TIE_LOW_XPD_BBPLL | PMU_TIE_LOW_XPD_BBPLL_I2C); in clk_ll_bbpll_disable()
77 SET_PERI_REG_MASK(PMU_IMM_HP_CK_POWER_REG, PMU_TIE_HIGH_XPD_BB_I2C | in clk_ll_bbpll_enable()79 SET_PERI_REG_MASK(PMU_IMM_HP_CK_POWER_REG, PMU_TIE_HIGH_GLOBAL_BBPLL_ICG); in clk_ll_bbpll_enable()87 SET_PERI_REG_MASK(PMU_IMM_HP_CK_POWER_REG, PMU_TIE_LOW_GLOBAL_BBPLL_ICG) ; in clk_ll_bbpll_disable()88 SET_PERI_REG_MASK(PMU_IMM_HP_CK_POWER_REG, PMU_TIE_LOW_XPD_BBPLL | PMU_TIE_LOW_XPD_BBPLL_I2C); in clk_ll_bbpll_disable()
1518 #define PMU_IMM_HP_CK_POWER_REG (DR_REG_PMU_BASE + 0xcc) macro
1574 #define PMU_IMM_HP_CK_POWER_REG (DR_REG_PMU_BASE + 0xcc) macro
