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Searched refs:PMU_HP_SLEEP_LP_CK_POWER_REG (Results 1 – 4 of 4) sorted by relevance

/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dclk_tree_ll.h93 SET_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_LPPLL); in clk_ll_lp_pll_enable()
102 CLEAR_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_LPPLL); in clk_ll_lp_pll_disable()
123 SET_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_XTAL32K); in clk_ll_xtal32k_enable()
132 CLEAR_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_XTAL32K); in clk_ll_xtal32k_disable()
142 return REG_GET_FIELD(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_XTAL32K) == 1; in clk_ll_xtal32k_is_enabled()
151 SET_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_RC32K); in clk_ll_rc32k_enable()
160 CLEAR_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_RC32K); in clk_ll_rc32k_disable()
170 return REG_GET_FIELD(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_RC32K) == 1; in clk_ll_rc32k_is_enabled()
178 SET_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_FOSC_CLK); in clk_ll_rc_fast_enable()
186 CLEAR_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_FOSC_CLK); in clk_ll_rc_fast_disable()
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/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dclk_tree_ll.h117 SET_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_XTAL32K); in clk_ll_xtal32k_enable()
126 CLEAR_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_XTAL32K); in clk_ll_xtal32k_disable()
136 return REG_GET_FIELD(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_XTAL32K) == 1; in clk_ll_xtal32k_is_enabled()
145 SET_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_RC32K); in clk_ll_rc32k_enable()
154 CLEAR_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_RC32K); in clk_ll_rc32k_disable()
164 return REG_GET_FIELD(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_RC32K) == 1; in clk_ll_rc32k_is_enabled()
172 SET_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_FOSC_CLK); in clk_ll_rc_fast_enable()
180 CLEAR_PERI_REG_MASK(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_FOSC_CLK); in clk_ll_rc_fast_disable()
190 return REG_GET_FIELD(PMU_HP_SLEEP_LP_CK_POWER_REG, PMU_HP_SLEEP_XPD_FOSC_CLK) == 1; in clk_ll_rc_fast_is_enabled()
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dpmu_reg.h1331 #define PMU_HP_SLEEP_LP_CK_POWER_REG (DR_REG_PMU_BASE + 0xac) macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dpmu_reg.h1366 #define PMU_HP_SLEEP_LP_CK_POWER_REG (DR_REG_PMU_BASE + 0xac) macro