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Searched refs:PCR_TG0_TIMER1_READY_V (Results 1 – 1 of 1) sorted by relevance

/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dpcr_reg.h547 #define PCR_TG0_TIMER1_READY_M (PCR_TG0_TIMER1_READY_V << PCR_TG0_TIMER1_READY_S)
548 #define PCR_TG0_TIMER1_READY_V 0x00000001U macro