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Searched refs:PANIC_RSN_INTWDT_CPU1 (Results 1 – 7 of 7) sorted by relevance

/hal_espressif-latest/components/xtensa/include/esp_private/
Dpanic_reason.h9 #define PANIC_RSN_INTWDT_CPU1 6 macro
/hal_espressif-latest/components/riscv/include/esp_private/
Dpanic_reason.h12 PANIC_RSN_INTWDT_CPU1, enumerator
/hal_espressif-latest/components/esp_system/port/
Dpanic_handler.c139 BUSY_WAIT_IF_TRUE(panic_get_cause(frame) == PANIC_RSN_INTWDT_CPU1 && core_id == 0);
177 || panic_get_cause(frame) == PANIC_RSN_INTWDT_CPU1
/hal_espressif-latest/components/esp_system/port/arch/xtensa/
Dpanic_arch.c69 (core == 1 && frame->exccause == PANIC_RSN_INTWDT_CPU1)) in panic_print_registers()
403 } else if (frame->exccause == PANIC_RSN_INTWDT_CPU1) { in panic_soc_fill_info()
/hal_espressif-latest/components/esp_system/port/soc/esp32s3/
Dhighint_hdl.S91 movi a0,PANIC_RSN_INTWDT_CPU1
/hal_espressif-latest/components/esp_system/port/arch/riscv/
Dpanic_arch.c298 _Static_assert(PANIC_RSN_INTWDT_CPU0 + 1 == PANIC_RSN_INTWDT_CPU1, in panic_soc_fill_info()
/hal_espressif-latest/components/esp_system/port/soc/esp32/
Dhighint_hdl.S267 movi a0,PANIC_RSN_INTWDT_CPU1