Searched refs:Own (Results 1 – 2 of 2) sorted by relevance
184 hal->rx_desc[i].RDES0.Own = EMAC_LL_DMADESC_OWNER_DMA; in emac_hal_reset_desc_chain()201 hal->tx_desc[i].TDES0.Own = EMAC_LL_DMADESC_OWNER_CPU; in emac_hal_reset_desc_chain()429 if (desc_iter->TDES0.Own != EMAC_LL_DMADESC_OWNER_CPU) { in emac_hal_transmit_frame()463 hal->tx_desc->TDES0.Own = EMAC_LL_DMADESC_OWNER_DMA; in emac_hal_transmit_frame()485 if (desc_iter->TDES0.Own != EMAC_LL_DMADESC_OWNER_CPU) { in emac_hal_transmit_multiple_buf_frame()551 hal->tx_desc->TDES0.Own = EMAC_LL_DMADESC_OWNER_DMA; in emac_hal_transmit_multiple_buf_frame()569 …while ((desc_iter->RDES0.Own != EMAC_LL_DMADESC_OWNER_DMA) && (used_descs < CONFIG_ETH_DMA_RX_BUFF… in emac_hal_alloc_recv_buf()610 …while ((desc_iter->RDES0.Own != EMAC_LL_DMADESC_OWNER_DMA) && (used_descs < CONFIG_ETH_DMA_RX_BUFF… in emac_hal_receive_frame()640 …while ((desc_iter->RDES0.Own != EMAC_LL_DMADESC_OWNER_DMA) && (used_descs < CONFIG_ETH_DMA_RX_BUFF… in emac_hal_receive_frame()655 desc_iter->RDES0.Own = EMAC_LL_DMADESC_OWNER_DMA; in emac_hal_receive_frame()[all …]
61 … uint32_t Own : 1; /*!< Owner of this descriptor: DMA controller or host */ member113 …uint32_t Own : 1; /*!< Owner of this descriptor: DMA controller or host… member
