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Searched refs:MMU_VALID_VAL_MASK (Results 1 – 17 of 17) sorted by relevance

/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dmmu_ll.h239 ret = mmu_raw_value & MMU_VALID_VAL_MASK; in mmu_ll_read_entry()
333 return (REG_READ(SPI_MEM_MMU_ITEM_CONTENT_REG(0)) & MMU_VALID_VAL_MASK) << shift_code; in mmu_ll_entry_id_to_paddr_base()
354 if ((REG_READ(SPI_MEM_MMU_ITEM_CONTENT_REG(0)) & MMU_VALID_VAL_MASK) == mmu_val) { in mmu_ll_find_entry_id_based_on_map_value()
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dmmu.h23 #define SOC_MMU_ADDR_MASK MMU_VALID_VAL_MASK
Dext_mem_defs.h87 #define MMU_VALID_VAL_MASK 0x3f macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dmmu.h23 #define SOC_MMU_ADDR_MASK MMU_VALID_VAL_MASK
Dext_mem_defs.h77 #define MMU_VALID_VAL_MASK 0xff macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dmmu.h23 #define SOC_MMU_ADDR_MASK MMU_VALID_VAL_MASK
Dext_mem_defs.h77 #define MMU_VALID_VAL_MASK 0x3fff macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dmmu.h23 #define SOC_MMU_ADDR_MASK MMU_VALID_VAL_MASK
Dext_mem_defs.h106 #define MMU_VALID_VAL_MASK 0x3fff macro
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dmmu_ll.h271 return ((*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4)) & MMU_VALID_VAL_MASK) << 16; in mmu_ll_entry_id_to_paddr_base()
291 if (((*(uint32_t *)(DR_REG_MMU_TABLE + i * 4)) & MMU_VALID_VAL_MASK) == mmu_val) { in mmu_ll_find_entry_id_based_on_map_value()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dmmu_ll.h270 return ((*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4)) & MMU_VALID_VAL_MASK) << 16; in mmu_ll_entry_id_to_paddr_base()
290 if (((*(uint32_t *)(DR_REG_MMU_TABLE + i * 4)) & MMU_VALID_VAL_MASK) == mmu_val) { in mmu_ll_find_entry_id_based_on_map_value()
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dmmu_ll.h317 return ((*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4)) & MMU_VALID_VAL_MASK) << shift_code; in mmu_ll_entry_id_to_paddr_base()
337 if (((*(uint32_t *)(DR_REG_MMU_TABLE + i * 4)) & MMU_VALID_VAL_MASK) == mmu_val) { in mmu_ll_find_entry_id_based_on_map_value()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dmmu_ll.h291 return ((*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4)) & MMU_VALID_VAL_MASK) << 16; in mmu_ll_entry_id_to_paddr_base()
311 if (((*(uint32_t *)(DR_REG_MMU_TABLE + i * 4)) & MMU_VALID_VAL_MASK) == mmu_val) { in mmu_ll_find_entry_id_based_on_map_value()
/hal_espressif-latest/components/esp_psram/
Dmmu_psram_flash.c171 instr_start_page &= MMU_VALID_VAL_MASK; in instruction_flash_page_info_init()
224 rodata_start_page &= MMU_VALID_VAL_MASK; in rodata_flash_page_info_init()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dmmu_ll.h359 return (REG_READ(SPI_MEM_MMU_ITEM_CONTENT_REG(0)) & MMU_VALID_VAL_MASK) << shift_code; in mmu_ll_entry_id_to_paddr_base()
380 if ((REG_READ(SPI_MEM_MMU_ITEM_CONTENT_REG(0)) & MMU_VALID_VAL_MASK) == mmu_val) { in mmu_ll_find_entry_id_based_on_map_value()
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dext_mem_defs.h80 #define MMU_VALID_VAL_MASK 0x1ff macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dext_mem_defs.h80 #define MMU_VALID_VAL_MASK 0x1ff macro