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Searched refs:MMU_INVALID (Results 1 – 15 of 15) sorted by relevance

/hal_espressif-latest/components/hal/esp32/include/hal/
Dmmu_ll.h273 DPORT_WRITE_PERI_REG((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[entry_id], MMU_INVALID); in mmu_ll_set_entry_invalid()
276 DPORT_WRITE_PERI_REG((uint32_t)&DPORT_APP_FLASH_MMU_TABLE[entry_id], MMU_INVALID); in mmu_ll_set_entry_invalid()
314 return (mmu_value & MMU_INVALID) ? false : true; in mmu_ll_check_entry_valid()
373 if (!(mmu_value & MMU_INVALID)) { in mmu_ll_find_entry_id_based_on_map_value()
384 if (!(mmu_value & MMU_INVALID)) { in mmu_ll_find_entry_id_based_on_map_value()
/hal_espressif-latest/components/esp_system/port/arch/xtensa/
Dpanic_arch.c203 if (REG_READ(EXTMEM_PRO_CACHE_MMU_FAULT_CONTENT_REG) & MMU_INVALID) { in print_cache_err_details()
238 if (REG_READ(EXTMEM_PRO_CACHE_MMU_FAULT_CONTENT_REG) & MMU_INVALID) { in print_cache_err_details()
248 if (REG_READ(EXTMEM_PRO_CACHE_MMU_FAULT_CONTENT_REG) & MMU_INVALID) { in print_cache_err_details()
350 if (REG_READ(EXTMEM_CACHE_MMU_FAULT_CONTENT_REG) & MMU_INVALID) { in print_cache_err_details()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dmmu_ll.h209 *(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) = MMU_INVALID; in mmu_ll_set_entry_invalid()
238 return (*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) & MMU_INVALID) ? false : true; in mmu_ll_check_entry_valid()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dmmu_ll.h209 *(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) = MMU_INVALID; in mmu_ll_set_entry_invalid()
238 return (*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) & MMU_INVALID) ? false : true; in mmu_ll_check_entry_valid()
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dmmu_ll.h242 *(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) = MMU_INVALID; in mmu_ll_set_entry_invalid()
271 return (*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) & MMU_INVALID) ? false : true; in mmu_ll_check_entry_valid()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dmmu_ll.h227 *(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) = MMU_INVALID; in mmu_ll_set_entry_invalid()
256 return (*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) & MMU_INVALID) ? false : true; in mmu_ll_check_entry_valid()
/hal_espressif-latest/components/soc/esp32/include/soc/
Dext_mem_defs.h40 #define MMU_INVALID BIT(8) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dext_mem_defs.h64 #define MMU_INVALID BIT(8) macro
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dext_mem_defs.h68 #define MMU_INVALID MMU_MSPI_INVALID macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dext_mem_defs.h63 #define MMU_INVALID BIT(14) macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dext_mem_defs.h68 #define MMU_INVALID MMU_MSPI_INVALID macro
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dext_mem_defs.h74 #define MMU_INVALID BIT(6) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dext_mem_defs.h96 #define MMU_INVALID BIT(14) macro
/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dmmu_ll.h253 REG_WRITE(SPI_MEM_MMU_ITEM_CONTENT_REG(0), MMU_INVALID); in mmu_ll_set_entry_invalid()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dmmu_ll.h260 REG_WRITE(SPI_MEM_MMU_ITEM_CONTENT_REG(0), MMU_INVALID); in mmu_ll_set_entry_invalid()