Searched refs:LCD_LL_PCLK_DIV_MAX (Results 1 – 1 of 1) sorted by relevance
29 #define LCD_LL_PCLK_DIV_MAX 64 // LCD_PCLK = LCD_CLK / MO, the MO register is 6 bit-width macro128 HAL_ASSERT(prescale <= LCD_LL_PCLK_DIV_MAX); in lcd_ll_set_pixel_clock_prescale()
