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Searched refs:IRAM0_CACHE_ADDRESS_LOW (Results 1 – 21 of 21) sorted by relevance

/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dext_mem_defs.h23 #define IRAM0_CACHE_ADDRESS_LOW 0x42000000 macro
24 #define IRAM0_CACHE_ADDRESS_HIGH (IRAM0_CACHE_ADDRESS_LOW + ((SOC_MMU_PAGE_SIZE) * …
26 #define DRAM0_CACHE_ADDRESS_LOW IRAM0_CACHE_ADDRESS_LOW //I/D share…
138 #define SOC_MMU_IRAM0_LINEAR_ADDRESS_LOW (IRAM0_CACHE_ADDRESS_LOW & SOC_MMU_LINEAR_ADDR_MASK)
Dmmu.h26 #define SOC_MMU_VADDR1_START_ADDR IRAM0_CACHE_ADDRESS_LOW
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dext_mem_defs.h23 #define IRAM0_CACHE_ADDRESS_LOW 0x42000000 macro
24 #define IRAM0_CACHE_ADDRESS_HIGH (IRAM0_CACHE_ADDRESS_LOW + ((SOC_MMU_PAGE_SIZE) * …
26 #define DRAM0_CACHE_ADDRESS_LOW IRAM0_CACHE_ADDRESS_LOW //I/D share…
138 #define SOC_MMU_IRAM0_LINEAR_ADDRESS_LOW (IRAM0_CACHE_ADDRESS_LOW & SOC_MMU_LINEAR_ADDR_MASK)
Dmmu.h26 #define SOC_MMU_VADDR1_START_ADDR IRAM0_CACHE_ADDRESS_LOW
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dcache_ll.h70 } else if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW) { in cache_ll_l1_get_bus()
75 mask |= (vaddr_end >= IRAM0_CACHE_ADDRESS_LOW) ? CACHE_BUS_IBUS0 : 0; in cache_ll_l1_get_bus()
80 mask |= (vaddr_end >= IRAM0_CACHE_ADDRESS_LOW) ? CACHE_BUS_IBUS0 : 0; in cache_ll_l1_get_bus()
86 mask |= (vaddr_end >= IRAM0_CACHE_ADDRESS_LOW) ? CACHE_BUS_IBUS0 : 0; in cache_ll_l1_get_bus()
93 mask |= (vaddr_end >= IRAM0_CACHE_ADDRESS_LOW) ? CACHE_BUS_IBUS0 : 0; in cache_ll_l1_get_bus()
Dmmu_ll.h105 valid |= ((vaddr_start >= IRAM0_CACHE_ADDRESS_LOW) && (vaddr_end < IRAM1_ADDRESS_HIGH)); in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dext_mem_defs.h28 #define IRAM0_CACHE_ADDRESS_LOW 0x42000000 macro
29 #define IRAM0_CACHE_ADDRESS_HIGH (IRAM0_CACHE_ADDRESS_LOW + ((SOC_MMU_PAGE_SIZE) * MM…
151 #define SOC_MMU_IRAM0_LINEAR_ADDRESS_LOW (IRAM0_CACHE_ADDRESS_LOW & SOC_MMU_LINEAR_ADDR_MASK)
Dmmu.h25 #define SOC_MMU_VADDR1_START_ADDR IRAM0_CACHE_ADDRESS_LOW
/hal_espressif-latest/components/soc/esp32/include/soc/
Dext_mem_defs.h16 #define IRAM0_CACHE_ADDRESS_LOW 0x400D0000 macro
71 #define SOC_MMU_IRAM0_LINEAR_ADDRESS_LOW (IRAM0_CACHE_ADDRESS_LOW & SOC_MMU_LINEAR_ADDR_MASK)
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dext_mem_defs.h18 #define IRAM0_CACHE_ADDRESS_LOW 0x42000000 macro
118 #define SOC_MMU_IRAM0_LINEAR_ADDRESS_LOW (IRAM0_CACHE_ADDRESS_LOW & SOC_MMU_LINEAR_ADDR_MASK)
Dmmu.h25 #define SOC_MMU_VADDR1_START_ADDR IRAM0_CACHE_ADDRESS_LOW
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dext_mem_defs.h17 #define IRAM0_CACHE_ADDRESS_LOW 0x42000000 macro
123 #define SOC_MMU_IRAM0_LINEAR_ADDRESS_LOW (IRAM0_CACHE_ADDRESS_LOW & SOC_MMU_LINEAR_ADDR_MASK)
Dmmu.h25 #define SOC_MMU_VADDR1_START_ADDR IRAM0_CACHE_ADDRESS_LOW
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dext_mem_defs.h18 #define IRAM0_CACHE_ADDRESS_LOW 0x40080000 macro
152 #define SOC_MMU_IRAM0_LINEAR_ADDRESS_LOW (IRAM0_CACHE_ADDRESS_LOW & SOC_MMU_LINEAR_ADDR_MASK)
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dcache_ll.h47 if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dcache_ll.h47 if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dcache_ll.h72 if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dcache_ll.h73 if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dcache_ll.h84 if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dcache_ll.h108 } else if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW) { in cache_ll_l1_get_bus()
/hal_espressif-latest/components/esp_psram/
Dmmu_psram_flash.c79 page_id = Cache_Flash_To_SPIRAM_Copy(CACHE_IBUS, IRAM0_CACHE_ADDRESS_LOW, page_id, &page0_page); in mmu_config_psram_text_segment()