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Searched refs:I2C_MST_ANA_CONF0_REG (Results 1 – 10 of 10) sorted by relevance

/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dregi2c_ctrl_ll.h23 REG_CLR_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH); in regi2c_ctrl_ll_bbpll_calibration_start()
24 REG_SET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW); in regi2c_ctrl_ll_bbpll_calibration_start()
32 REG_CLR_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW); in regi2c_ctrl_ll_bbpll_calibration_stop()
33 REG_SET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH); in regi2c_ctrl_ll_bbpll_calibration_stop()
43 return REG_GET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_CAL_DONE); in regi2c_ctrl_ll_bbpll_calibration_is_done()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dregi2c_ctrl_ll.h25 REG_CLR_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH); in regi2c_ctrl_ll_bbpll_calibration_start()
26 REG_SET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW); in regi2c_ctrl_ll_bbpll_calibration_start()
34 REG_CLR_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW); in regi2c_ctrl_ll_bbpll_calibration_stop()
35 REG_SET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH); in regi2c_ctrl_ll_bbpll_calibration_stop()
45 return REG_GET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_CAL_DONE); in regi2c_ctrl_ll_bbpll_calibration_is_done()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dregi2c_ctrl_ll.h56 REG_CLR_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH); in regi2c_ctrl_ll_bbpll_calibration_start()
57 REG_SET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW); in regi2c_ctrl_ll_bbpll_calibration_start()
65 REG_CLR_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW); in regi2c_ctrl_ll_bbpll_calibration_stop()
66 REG_SET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH); in regi2c_ctrl_ll_bbpll_calibration_stop()
76 return REG_GET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_CAL_DONE); in regi2c_ctrl_ll_bbpll_calibration_is_done()
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dregi2c_ctrl_ll.h38 REG_CLR_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH); in regi2c_ctrl_ll_bbpll_calibration_start()
39 REG_SET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW); in regi2c_ctrl_ll_bbpll_calibration_start()
47 REG_CLR_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW); in regi2c_ctrl_ll_bbpll_calibration_stop()
48 REG_SET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH); in regi2c_ctrl_ll_bbpll_calibration_stop()
58 return REG_GET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_CAL_DONE); in regi2c_ctrl_ll_bbpll_calibration_is_done()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dregi2c_ctrl_ll.h38 REG_CLR_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH); in regi2c_ctrl_ll_bbpll_calibration_start()
39 REG_SET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW); in regi2c_ctrl_ll_bbpll_calibration_start()
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dregi2c_defs.h12 #define I2C_MST_ANA_CONF0_REG 0x600AF818 macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dregi2c_defs.h12 #define I2C_MST_ANA_CONF0_REG 0x6000E040 macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dregi2c_defs.h12 #define I2C_MST_ANA_CONF0_REG 0x6000E040 macro
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dregi2c_defs.h13 #define I2C_MST_ANA_CONF0_REG 0x6004E840 macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Di2c_ana_mst_reg.h104 #define I2C_MST_ANA_CONF0_REG (DR_REG_I2C_ANA_MST_BASE + 0x18) macro