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Searched refs:EXTMEM_CORE0_IBUS_REJECT_ST (Results 1 – 4 of 4) sorted by relevance

/hal_espressif-latest/components/esp_system/port/arch/riscv/
Dpanic_arch.c96 .bit = EXTMEM_CORE0_IBUS_REJECT_ST, in print_cache_err_details()
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dextmem_reg.h444 #define EXTMEM_CORE0_IBUS_REJECT_ST (BIT(2)) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dextmem_reg.h602 #define EXTMEM_CORE0_IBUS_REJECT_ST (BIT(2)) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dextmem_reg.h1065 #define EXTMEM_CORE0_IBUS_REJECT_ST (BIT(2)) macro