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Searched refs:EXTMEM_CACHE_ILG_INT_ST_REG (Results 1 – 8 of 8) sorted by relevance

/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dcache_ll.h199 return GET_PERI_REG_MASK(EXTMEM_CACHE_ILG_INT_ST_REG, mask); in cache_ll_l1_get_illegal_error_intr_status()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dcache_ll.h200 return GET_PERI_REG_MASK(EXTMEM_CACHE_ILG_INT_ST_REG, mask); in cache_ll_l1_get_illegal_error_intr_status()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dcache_ll.h270 return GET_PERI_REG_MASK(EXTMEM_CACHE_ILG_INT_ST_REG, mask); in cache_ll_l1_get_illegal_error_intr_status()
/hal_espressif-latest/components/esp_system/port/arch/riscv/
Dpanic_arch.c137 const uint32_t cache_ilg_status = REG_READ(EXTMEM_CACHE_ILG_INT_ST_REG); in print_cache_err_details()
/hal_espressif-latest/components/esp_system/port/arch/xtensa/
Dpanic_arch.c299 status = REG_READ(EXTMEM_CACHE_ILG_INT_ST_REG); in print_cache_err_details()
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dextmem_reg.h272 #define EXTMEM_CACHE_ILG_INT_ST_REG (DR_REG_EXTMEM_BASE + 0x80) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dextmem_reg.h452 #define EXTMEM_CACHE_ILG_INT_ST_REG (DR_REG_EXTMEM_BASE + 0x080) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dextmem_reg.h901 #define EXTMEM_CACHE_ILG_INT_ST_REG (DR_REG_EXTMEM_BASE + 0xE4) macro