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Searched refs:ESP_CPU_INTR_DESC_FLAG_RESVD (Results 1 – 7 of 7) sorted by relevance

/hal_espressif-latest/components/esp_hw_support/port/esp32/
Desp_cpu_intr.c30 #define STATE_INTERRUPT_25 ESP_CPU_INTR_DESC_FLAG_RESVD
32 #define STATE_INTERRUPT_5 ESP_CPU_INTR_DESC_FLAG_RESVD
41 #define STATE_INTERRUPT_1 ESP_CPU_INTR_DESC_FLAG_RESVD
46 #define STATE_INTERRUPT_7 ESP_CPU_INTR_DESC_FLAG_RESVD
67 #define CORE_0_INTERRUPT_8 ESP_CPU_INTR_DESC_FLAG_RESVD
84 #define CORE_1_INTERRUPT_8 ESP_CPU_INTR_DESC_FLAG_RESVD
112 #define CORE_0_INTERRUPT_26 ESP_CPU_INTR_DESC_FLAG_RESVD
113 #define CORE_1_INTERRUPT_26 ESP_CPU_INTR_DESC_FLAG_RESVD
117 #define CORE_0_INTERRUPT_31 ESP_CPU_INTR_DESC_FLAG_RESVD
118 #define CORE_1_INTERRUPT_31 ESP_CPU_INTR_DESC_FLAG_RESVD
[all …]
/hal_espressif-latest/components/esp_hw_support/port/esp32s3/
Desp_cpu_intr.c26 …[0] = { 1, ESP_CPU_INTR_TYPE_LEVEL, { ESP_CPU_INTR_DESC_FLAG_RESVD, 0 …
28 …1, ESP_CPU_INTR_TYPE_LEVEL, { 0, ESP_CPU_INTR_DESC_FLAG_RESVD } },
34 …[4] = { 1, ESP_CPU_INTR_TYPE_LEVEL, { ESP_CPU_INTR_DESC_FLAG_RESVD, 0 …
45 …[14] = { 7, ESP_CPU_INTR_TYPE_LEVEL, { ESP_CPU_INTR_DESC_FLAG_RESVD, ESP_CPU_INTR_DESC_FLAG_RESV…
56 …[24] = { 4, ESP_CPU_INTR_TYPE_LEVEL, { ESP_CPU_INTR_DESC_FLAG_RESVD, ESP_CPU_INTR_DESC_FLAG_RESV…
58 …[25] = { 4, ESP_CPU_INTR_TYPE_LEVEL, { ESP_CPU_INTR_DESC_FLAG_RESVD, ESP_CPU_INTR_DESC_FLAG_RESV…
62 …[28] = { 4, ESP_CPU_INTR_TYPE_EDGE, { ESP_CPU_INTR_DESC_FLAG_RESVD, ESP_CPU_INTR_DESC_FLAG_RESV…
/hal_espressif-latest/components/esp_hw_support/port/esp32s2/
Desp_cpu_intr.c27 [0] = { 1, ESP_CPU_INTR_TYPE_LEVEL, ESP_CPU_INTR_DESC_FLAG_RESVD },
32 [4] = { 1, ESP_CPU_INTR_TYPE_LEVEL, ESP_CPU_INTR_DESC_FLAG_RESVD },
35 [6] = { 1, ESP_CPU_INTR_TYPE_NA, ESP_CPU_INTR_DESC_FLAG_RESVD },
47 [14] = { 7, ESP_CPU_INTR_TYPE_LEVEL, ESP_CPU_INTR_DESC_FLAG_RESVD },
49 [15] = { 3, ESP_CPU_INTR_TYPE_NA, ESP_CPU_INTR_DESC_FLAG_RESVD },
62 [24] = { 4, ESP_CPU_INTR_TYPE_LEVEL, ESP_CPU_INTR_DESC_FLAG_RESVD },
64 [25] = { 4, ESP_CPU_INTR_TYPE_LEVEL, ESP_CPU_INTR_DESC_FLAG_RESVD },
/hal_espressif-latest/components/esp_hw_support/include/esp_private/
Desp_riscv_intr.h27 return ESP_CPU_INTR_DESC_FLAG_RESVD; in esp_riscv_intr_num_flags()
36 return (destination != (intptr_t)&_interrupt_handler) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0; in esp_riscv_intr_num_flags()
59 return ESP_CPU_INTR_DESC_FLAG_RESVD; in esp_riscv_intr_num_flags()
69 return (destination != (intptr_t)&_interrupt_handler) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0; in esp_riscv_intr_num_flags()
/hal_espressif-latest/components/esp_hw_support/include/hal/
Dinterrupt_controller_hal.h86 } else if (intr_desc.flags & ESP_CPU_INTR_DESC_FLAG_RESVD) { in interrupt_controller_hal_desc_flags()
/hal_espressif-latest/components/esp_hw_support/include/
Desp_cpu.h63 #define ESP_CPU_INTR_DESC_FLAG_RESVD 0x02 /**< The interrupt is reserved for internal use… macro
/hal_espressif-latest/components/esp_hw_support/
Dintr_alloc.c245 if (intr_desc.flags & ESP_CPU_INTR_DESC_FLAG_RESVD) { in is_vect_desc_usable()
369 x, intr_desc.flags & ESP_CPU_INTR_DESC_FLAG_RESVD, intr_desc.priority, in get_available_int()