Searched refs:DR_REG_WCL_BASE (Results 1 – 2 of 2) sorted by relevance
17 #define WCL_CORE_0_ENTRY_1_ADDR_REG (DR_REG_WCL_BASE + 0x0)29 #define WCL_CORE_0_ENTRY_2_ADDR_REG (DR_REG_WCL_BASE + 0x4)41 #define WCL_CORE_0_ENTRY_3_ADDR_REG (DR_REG_WCL_BASE + 0x8)53 #define WCL_CORE_0_ENTRY_4_ADDR_REG (DR_REG_WCL_BASE + 0xc)65 #define WCL_CORE_0_ENTRY_5_ADDR_REG (DR_REG_WCL_BASE + 0x10)77 #define WCL_CORE_0_ENTRY_6_ADDR_REG (DR_REG_WCL_BASE + 0x14)89 #define WCL_CORE_0_ENTRY_7_ADDR_REG (DR_REG_WCL_BASE + 0x18)101 #define WCL_CORE_0_ENTRY_8_ADDR_REG (DR_REG_WCL_BASE + 0x1c)113 #define WCL_CORE_0_ENTRY_9_ADDR_REG (DR_REG_WCL_BASE + 0x20)125 #define WCL_CORE_0_ENTRY_10_ADDR_REG (DR_REG_WCL_BASE + 0x24)[all …]
64 #define DR_REG_WCL_BASE 0x600D0000 macro
