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Searched refs:DR_REG_PLIC_UX_BASE (Results 1 – 3 of 3) sorted by relevance

/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dplic_reg.h14 #define DR_REG_PLIC_UX_BASE ( 0x20001400 ) macro
327 #define PLIC_UXINT_ENABLE_REG (DR_REG_PLIC_UX_BASE + 0x0)
335 #define PLIC_UXINT_TYPE_REG (DR_REG_PLIC_UX_BASE + 0x4)
343 #define PLIC_UXINT_CLEAR_REG (DR_REG_PLIC_UX_BASE + 0x8)
351 #define PLIC_EUIP_STATUS_REG (DR_REG_PLIC_UX_BASE + 0xC)
359 #define PLIC_UXINT0_PRI_REG (DR_REG_PLIC_UX_BASE + 0x10)
367 #define PLIC_UXINT1_PRI_REG (DR_REG_PLIC_UX_BASE + 0x14)
375 #define PLIC_UXINT2_PRI_REG (DR_REG_PLIC_UX_BASE + 0x18)
383 #define PLIC_UXINT3_PRI_REG (DR_REG_PLIC_UX_BASE + 0x1C)
391 #define PLIC_UXINT4_PRI_REG (DR_REG_PLIC_UX_BASE + 0x20)
[all …]
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dplic_reg.h325 #define PLIC_UXINT_ENABLE_REG (DR_REG_PLIC_UX_BASE + 0x0)
333 #define PLIC_UXINT_TYPE_REG (DR_REG_PLIC_UX_BASE + 0x4)
341 #define PLIC_UXINT_CLEAR_REG (DR_REG_PLIC_UX_BASE + 0x8)
349 #define PLIC_EUIP_STATUS_REG (DR_REG_PLIC_UX_BASE + 0xC)
357 #define PLIC_UXINT0_PRI_REG (DR_REG_PLIC_UX_BASE + 0x10)
365 #define PLIC_UXINT1_PRI_REG (DR_REG_PLIC_UX_BASE + 0x14)
373 #define PLIC_UXINT2_PRI_REG (DR_REG_PLIC_UX_BASE + 0x18)
381 #define PLIC_UXINT3_PRI_REG (DR_REG_PLIC_UX_BASE + 0x1C)
389 #define PLIC_UXINT4_PRI_REG (DR_REG_PLIC_UX_BASE + 0x20)
397 #define PLIC_UXINT5_PRI_REG (DR_REG_PLIC_UX_BASE + 0x24)
[all …]
Dreg_base.h8 #define DR_REG_PLIC_UX_BASE 0x20001400 macro