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Searched refs:DR_REG_INTERRUPT_MATRIX_BASE (Results 1 – 8 of 8) sorted by relevance

/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dinterrupt_matrix_reg.h16 #define INTMTX_CORE0_WIFI_MAC_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x0)
28 #define INTMTX_CORE0_WIFI_MAC_NMI_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x4)
40 #define INTMTX_CORE0_WIFI_PWR_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x8)
52 #define INTMTX_CORE0_WIFI_BB_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0xc)
64 #define INTMTX_CORE0_BT_MAC_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x10)
76 #define INTMTX_CORE0_BT_BB_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x14)
88 #define INTMTX_CORE0_BT_BB_NMI_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x18)
100 #define INTMTX_CORE0_LP_TIMER_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x1c)
112 #define INTMTX_CORE0_COEX_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x20)
124 #define INTMTX_CORE0_BLE_TIMER_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x24)
[all …]
Dinterrupt_reg.h19 #define DR_REG_INTERRUPT_BASE DR_REG_INTERRUPT_MATRIX_BASE
Dreg_base.h28 #define DR_REG_INTERRUPT_MATRIX_BASE 0x60010000 macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dinterrupt_matrix_reg.h17 #define INTMTX_CORE0_PMU_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x0)
29 #define INTMTX_CORE0_EFUSE_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x4)
41 #define INTMTX_CORE0_LP_RTC_TIMER_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x8)
53 #define INTMTX_CORE0_LP_BLE_TIMER_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0xc)
65 #define INTMTX_CORE0_LP_WDT_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x10)
77 #define INTMTX_CORE0_LP_PERI_TIMEOUT_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x14)
89 #define INTMTX_CORE0_LP_APM_M0_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x18)
101 #define INTMTX_CORE0_CPU_INTR_FROM_CPU_0_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x1c)
113 #define INTMTX_CORE0_CPU_INTR_FROM_CPU_1_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x20)
125 #define INTMTX_CORE0_CPU_INTR_FROM_CPU_2_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x24)
[all …]
Dinterrupt_reg.h17 #define DR_REG_INTERRUPT_BASE DR_REG_INTERRUPT_MATRIX_BASE
Dreg_base.h23 #define DR_REG_INTERRUPT_MATRIX_BASE 0x60010000 macro
/hal_espressif-latest/tools/esptool_py/flasher_stub/include/
Dsoc_support.h339 #define DR_REG_INTERRUPT_MATRIX_BASE 0x60010000 macro
340 #define INTERRUPT_CORE0_USB_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0xC0) /* USB-JTAG-S…
348 #define DR_REG_INTERRUPT_MATRIX_BASE 0x60010000 macro
349 #define INTERRUPT_CORE0_USB_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x94) /* USB-JTAG-S…
358 #define DR_REG_INTERRUPT_MATRIX_BASE 0x500D6000 macro
359 #define INTERRUPT_CORE0_USB_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0x58) /* USB-JTAG-S…
/hal_espressif-latest/components/esp_hw_support/
Dsleep_system_peripheral.c39 …#define N_REGS_INTR_MATRIX() (((INTMTX_CORE0_CLOCK_GATE_REG - DR_REG_INTERRUPT_MATRIX_BASE) / 4… in sleep_sys_periph_intr_matrix_retention_init()
42 …MA_LINK_CONTINUOUS_INIT(REGDMA_INTMTX_LINK(0), DR_REG_INTERRUPT_MATRIX_BASE, DR_REG_INTERRUPT_MATR… in sleep_sys_periph_intr_matrix_retention_init()