1 /* 2 * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 #define DR_REG_SYSTEM_BASE 0x600c0000 7 #define DR_REG_SENSITIVE_BASE 0x600c1000 8 #define DR_REG_INTERRUPT_BASE 0x600c2000 9 #define DR_REG_EXTMEM_BASE 0x600c4000 // CACHE_CONFIG 10 #define DR_REG_MMU_TABLE 0x600c5000 11 #define DR_REG_SHA_BASE 0x6003b000 12 #define DR_REG_ECC_MULT_BASE 0x6003e000 13 #define DR_REG_GDMA_BASE 0x6003f000 14 #define DR_REG_ASSIST_DEBUG_BASE 0x600ce000 15 #define DR_REG_DEDICATED_GPIO_BASE 0x600cf000 16 #define DR_REG_WORLD_CNTL_BASE 0x600d0000 17 #define DR_REG_UART_BASE 0x60000000 18 #define DR_REG_SPI1_BASE 0x60002000 19 #define DR_REG_SPI0_BASE 0x60003000 20 #define DR_REG_GPIO_BASE 0x60004000 21 #define DR_REG_FE2_BASE 0x60005000 22 #define DR_REG_FE_BASE 0x60006000 23 #define DR_REG_RTCCNTL_BASE 0x60008000 24 #define DR_REG_IO_MUX_BASE 0x60009000 25 #define DR_REG_RTC_I2C_BASE 0x6000e000 26 #define DR_REG_UART1_BASE 0x60010000 27 #define DR_REG_I2C_EXT_BASE 0x60013000 28 #define DR_REG_LEDC_BASE 0x60019000 29 #define DR_REG_EFUSE_BASE 0x60008800 30 #define DR_REG_NRX_BASE 0x6001CC00 31 #define DR_REG_BB_BASE 0x6001D000 32 #define DR_REG_TIMERGROUP0_BASE 0x6001F000 33 #define DR_REG_SYSTIMER_BASE 0x60023000 34 #define DR_REG_SPI2_BASE 0x60024000 35 #define DR_REG_SYSCON_BASE 0x60026000 36 #define DR_REG_APB_SARADC_BASE 0x60040000 37 #define DR_REG_WDEVLE_BASE 0x60045000 38 #define DR_REG_ETM_BIT_BASE 0x6004B000 39 #define DR_REG_BLE_TIMER_BASE 0x6004B800 40 #define DR_REG_BLE_SEC_BASE 0x6004C000 41 #define DR_REG_COEX_BIT_BASE 0x6004C400 42 #define DR_REG_MODEM_CLKRST_BASE 0x6004d800 43 #define DR_REG_I2C_MST_BASE 0x6004E800 44 #define DR_REG_AES_XTS_BASE 0x600CC000 45
