Home
last modified time | relevance | path

Searched refs:DRAM0_CACHE_ADDRESS_HIGH (Results 1 – 12 of 12) sorted by relevance

/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dext_mem_defs.h25 #define DRAM0_CACHE_ADDRESS_HIGH 0x3C800000 macro
26 #define DRAM0_CACHE_OPERATION_HIGH DRAM0_CACHE_ADDRESS_HIGH
126 #if ((DRAM0_CACHE_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK) > 0)
127 #define SOC_MMU_DRAM0_LINEAR_ADDRESS_HIGH (DRAM0_CACHE_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK)
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dext_mem_defs.h27 #define DRAM0_CACHE_ADDRESS_HIGH IRAM0_CACHE_ADDRESS_HIGH //I/D share… macro
28 #define DRAM0_CACHE_OPERATION_HIGH DRAM0_CACHE_ADDRESS_HIGH
146 #if ((DRAM0_CACHE_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK) > 0)
147 #define SOC_MMU_DRAM0_LINEAR_ADDRESS_HIGH (DRAM0_CACHE_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK)
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dext_mem_defs.h24 #define DRAM0_CACHE_ADDRESS_HIGH 0x3E000000 macro
25 #define DRAM0_CACHE_OPERATION_HIGH DRAM0_CACHE_ADDRESS_HIGH
131 #if ((DRAM0_CACHE_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK) > 0)
132 #define SOC_MMU_DRAM0_LINEAR_ADDRESS_HIGH (DRAM0_CACHE_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK)
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dext_mem_defs.h27 #define DRAM0_CACHE_ADDRESS_HIGH IRAM0_CACHE_ADDRESS_HIGH //I/D share… macro
28 #define DRAM0_CACHE_OPERATION_HIGH DRAM0_CACHE_ADDRESS_HIGH
146 #if ((DRAM0_CACHE_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK) > 0)
147 #define SOC_MMU_DRAM0_LINEAR_ADDRESS_HIGH (DRAM0_CACHE_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK)
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dext_mem_defs.h35 #define DRAM0_CACHE_ADDRESS_HIGH (DRAM0_CACHE_ADDRESS_LOW + ((SOC_MMU_PAGE_SIZE) * MM… macro
36 #define DRAM0_CACHE_OPERATION_HIGH DRAM0_CACHE_ADDRESS_HIGH
159 #if ((DRAM0_CACHE_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK) > 0)
160 #define SOC_MMU_DRAM0_LINEAR_ADDRESS_HIGH (DRAM0_CACHE_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK)
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dext_mem_defs.h33 #define DRAM0_CACHE_ADDRESS_HIGH 0x3ff80000 macro
168 #define SOC_MMU_DRAM0_LINEAR_ADDRESS_HIGH (DRAM0_CACHE_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK)
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dcache_ll.h74 } else if (vaddr_start >= DRAM0_CACHE_ADDRESS_LOW && vaddr_end < DRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dcache_ll.h75 } else if (vaddr_start >= DRAM0_CACHE_ADDRESS_LOW && vaddr_end < DRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dcache_ll.h86 } else if (vaddr_start >= DRAM0_CACHE_ADDRESS_LOW && vaddr_end < DRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dmmu_ll.h101 …ESS_HIGH)) || ((vaddr_start >= DPORT_CACHE_ADDRESS_LOW) && (vaddr_end < DRAM0_CACHE_ADDRESS_HIGH)); in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/bootloader_support/bootloader_flash/src/
Dbootloader_flash.c147 #define MMAP_MMU_SIZE (DRAM0_CACHE_ADDRESS_HIGH - DRAM0_CACHE_ADDRESS_LOW) // This mmu size mea…
/hal_espressif-latest/zephyr/port/bootloader/
Dbootloader_flash.c142 #define MMAP_MMU_SIZE (DRAM0_CACHE_ADDRESS_HIGH - DRAM0_CACHE_ADDRESS_LOW) // This mmu size mea…