Searched refs:DPORT_SEQUENCE_REG_READ (Results 1 – 10 of 10) sorted by relevance
248 mmu_value = DPORT_SEQUENCE_REG_READ((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[entry_id]); in mmu_ll_read_entry()251 mmu_value = DPORT_SEQUENCE_REG_READ((uint32_t)&DPORT_APP_FLASH_MMU_TABLE[entry_id]); in mmu_ll_read_entry()311 uint32_t mmu_value = DPORT_SEQUENCE_REG_READ((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[entry_id]); in mmu_ll_check_entry_valid()347 uint32_t mmu_value = DPORT_SEQUENCE_REG_READ((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[entry_id]); in mmu_ll_entry_id_to_paddr_base()372 uint32_t mmu_value = DPORT_SEQUENCE_REG_READ((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[i]); in mmu_ll_find_entry_id_based_on_map_value()383 uint32_t mmu_value = DPORT_SEQUENCE_REG_READ((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[i]); in mmu_ll_find_entry_id_based_on_map_value()
138 digest_state_words[i + 1] = DPORT_SEQUENCE_REG_READ((uint32_t)®_addr_buf[i]); in sha_ll_read_digest()139 digest_state_words[i] = DPORT_SEQUENCE_REG_READ((uint32_t)®_addr_buf[i + 1]); in sha_ll_read_digest()
15 buff_out[i] = DPORT_SEQUENCE_REG_READ(address + i * 4); in esp_dport_access_read_buffer()
114 #define DPORT_SEQUENCE_REG_READ(reg) _DPORT_REG_READ(reg) macro117 #define DPORT_SEQUENCE_REG_READ(reg) esp_dport_access_sequence_reg_read(reg) macro
40 #define DPORT_SEQUENCE_REG_READ(_r) _DPORT_REG_READ(_r) macro
37 #define DPORT_SEQUENCE_REG_READ(_r) _DPORT_REG_READ(_r) macro
39 #define DPORT_SEQUENCE_REG_READ(_r) _DPORT_REG_READ(_r) macro
38 #define DPORT_SEQUENCE_REG_READ(_r) _DPORT_REG_READ(_r) macro
