Searched refs:DPORT_PMS_PRO_IRAM0_3_REG (Results 1 – 2 of 2) sorted by relevance
| /hal_espressif-latest/components/hal/esp32s2/include/hal/ |
| D | memprot_ll.h | 417 return DPORT_READ_PERI_REG(DPORT_PMS_PRO_IRAM0_3_REG); in memprot_ll_iram0_rtcfast_get_perm_split_reg()
457 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_IRAM0_3_REG, reg_split_addr | permission_mask); in memprot_ll_iram0_rtcfast_set_prot()
464 *lw = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_3_REG, DPORT_PMS_PRO_IRAM0_RTCFAST_L_W); in memprot_ll_iram0_rtcfast_get_split_sgnf_bits()
465 *lr = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_3_REG, DPORT_PMS_PRO_IRAM0_RTCFAST_L_R); in memprot_ll_iram0_rtcfast_get_split_sgnf_bits()
466 *lx = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_3_REG, DPORT_PMS_PRO_IRAM0_RTCFAST_L_F); in memprot_ll_iram0_rtcfast_get_split_sgnf_bits()
467 *hw = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_3_REG, DPORT_PMS_PRO_IRAM0_RTCFAST_H_W); in memprot_ll_iram0_rtcfast_get_split_sgnf_bits()
468 *hr = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_3_REG, DPORT_PMS_PRO_IRAM0_RTCFAST_H_R); in memprot_ll_iram0_rtcfast_get_split_sgnf_bits()
469 *hx = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_3_REG, DPORT_PMS_PRO_IRAM0_RTCFAST_H_F); in memprot_ll_iram0_rtcfast_get_split_sgnf_bits()
474 DPORT_REG_SET_FIELD(DPORT_PMS_PRO_IRAM0_3_REG, DPORT_PMS_PRO_IRAM0_RTCFAST_L_R, lr ? 1 : 0); in memprot_ll_iram0_rtcfast_set_read_perm()
475 DPORT_REG_SET_FIELD(DPORT_PMS_PRO_IRAM0_3_REG, DPORT_PMS_PRO_IRAM0_RTCFAST_H_R, hr ? 1 : 0); in memprot_ll_iram0_rtcfast_set_read_perm()
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| /hal_espressif-latest/components/soc/esp32s2/include/soc/ |
| D | sensitive_reg.h | 180 #define DPORT_PMS_PRO_IRAM0_3_REG (DR_REG_SENSITIVE_BASE + 0x01C) macro
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