Searched refs:DPORT_PMS_PRO_IRAM0_2_REG (Results 1 – 2 of 2) sorted by relevance
| /hal_espressif-latest/components/hal/esp32s2/include/hal/ |
| D | memprot_ll.h | 270 return DPORT_READ_PERI_REG(DPORT_PMS_PRO_IRAM0_2_REG); in memprot_ll_iram0_sram_get_perm_split_reg()
361 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_IRAM0_2_REG, (uint32_t)(reg_split_addr | permission_mask)); in memprot_ll_iram0_sram_set_prot()
368 *lw = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_L_W); in memprot_ll_iram0_sram_get_split_sgnf_bits()
369 *lr = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_L_R); in memprot_ll_iram0_sram_get_split_sgnf_bits()
370 *lx = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_L_F); in memprot_ll_iram0_sram_get_split_sgnf_bits()
371 *hw = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_H_W); in memprot_ll_iram0_sram_get_split_sgnf_bits()
372 *hr = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_H_R); in memprot_ll_iram0_sram_get_split_sgnf_bits()
373 *hx = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_H_F); in memprot_ll_iram0_sram_get_split_sgnf_bits()
378 DPORT_REG_SET_FIELD(DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_L_R, lr ? 1 : 0); in memprot_ll_iram0_sram_set_read_perm()
379 DPORT_REG_SET_FIELD(DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_H_R, hr ? 1 : 0); in memprot_ll_iram0_sram_set_read_perm()
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| /hal_espressif-latest/components/soc/esp32s2/include/soc/ |
| D | sensitive_reg.h | 136 #define DPORT_PMS_PRO_IRAM0_2_REG (DR_REG_SENSITIVE_BASE + 0x018) macro
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