Searched refs:DPORT_PMS_PRO_DRAM0_3_REG (Results 1 – 2 of 2) sorted by relevance
504 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_EN); in memprot_ll_dram0_intr_ena()506 DPORT_CLEAR_PERI_REG_MASK(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_EN); in memprot_ll_dram0_intr_ena()512 return DPORT_GET_PERI_REG_MASK(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_INTR) > 0; in memprot_ll_dram0_is_assoc_intr()517 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_CLR); in memprot_ll_dram0_clear_intr()518 DPORT_CLEAR_PERI_REG_MASK(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_CLR); in memprot_ll_dram0_clear_intr()523 return DPORT_REG_GET_FIELD(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_EN); in memprot_ll_dram0_get_intr_ena_bit()528 return DPORT_REG_GET_FIELD(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_INTR); in memprot_ll_dram0_get_intr_on_bit()533 return DPORT_REG_GET_FIELD(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_CLR); in memprot_ll_dram0_get_intr_clr_bit()554 return DPORT_READ_PERI_REG(DPORT_PMS_PRO_DRAM0_3_REG); in memprot_ll_dram0_get_conf_reg()
372 #define DPORT_PMS_PRO_DRAM0_3_REG (DR_REG_SENSITIVE_BASE + 0x034) macro
