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Searched refs:DPORT_CPU_PER_CONF_REG (Results 1 – 5 of 5) sorted by relevance

/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dclk_tree_ll.h353 uint32_t pll_freq_sel = DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_PLL_FREQ_SEL); in clk_ll_bbpll_get_freq_mhz()
373 CLEAR_PERI_REG_MASK(DPORT_CPU_PER_CONF_REG, DPORT_PLL_FREQ_SEL); in clk_ll_bbpll_set_freq_mhz()
376 SET_PERI_REG_MASK(DPORT_CPU_PER_CONF_REG, DPORT_PLL_FREQ_SEL); in clk_ll_bbpll_set_freq_mhz()
506 REG_SET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL, 0); in clk_ll_cpu_set_freq_mhz_from_pll()
509 REG_SET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL, 1); in clk_ll_cpu_set_freq_mhz_from_pll()
512 REG_SET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL, 2); in clk_ll_cpu_set_freq_mhz_from_pll()
527 uint32_t cpu_freq_sel = DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL); in clk_ll_cpu_get_freq_mhz_from_pll()
572 uint32_t pll_freq_sel = DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_PLL_FREQ_SEL); in clk_ll_cpu_get_divider_from_apll()
573 uint32_t cpu_freq_sel = DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL); in clk_ll_cpu_get_divider_from_apll()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dclk_tree_ll.h402 uint32_t cpu_freq_sel = DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL); in clk_ll_bbpll_get_freq_mhz()
584 DPORT_REG_WRITE(DPORT_CPU_PER_CONF_REG, 0); in clk_ll_cpu_set_freq_mhz_from_pll()
587 DPORT_REG_WRITE(DPORT_CPU_PER_CONF_REG, 1); in clk_ll_cpu_set_freq_mhz_from_pll()
590 DPORT_REG_WRITE(DPORT_CPU_PER_CONF_REG, 2); in clk_ll_cpu_set_freq_mhz_from_pll()
605 uint32_t cpu_freq_sel = DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL); in clk_ll_cpu_get_freq_mhz_from_pll()
648 uint32_t cpu_freq_sel = DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL); in clk_ll_cpu_get_divider_from_apll()
/hal_espressif-latest/components/esp_hw_support/port/esp32s2/
Drtc_init.c152 CLEAR_PERI_REG_MASK(DPORT_CPU_PER_CONF_REG, DPORT_CPU_WAIT_MODE_FORCE_ON); in rtc_init()
154 SET_PERI_REG_MASK(DPORT_CPU_PER_CONF_REG, DPORT_CPU_WAIT_MODE_FORCE_ON); in rtc_init()
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dsystem_reg.h85 #define DPORT_CPU_PER_CONF_REG (DR_REG_SYSTEM_BASE + 0x018) macro
/hal_espressif-latest/components/soc/esp32/include/soc/
Ddport_reg.h155 #define DPORT_CPU_PER_CONF_REG (DR_REG_DPORT_BASE + 0x03C) macro