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Searched refs:DPORT_APP_DCACHE_DBUG0_REG (Results 1 – 3 of 3) sorted by relevance

/hal_espressif-latest/components/esp_psram/esp32/
Desp_psram_extram_cache.c74 …while (DPORT_GET_PERI_REG_BITS2(DPORT_APP_DCACHE_DBUG0_REG, DPORT_APP_CACHE_STATE, DPORT_APP_CACHE… in esp_psram_extram_writeback_cache()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dcache_ll.h53 …while (DPORT_GET_PERI_REG_BITS2(DPORT_APP_DCACHE_DBUG0_REG, DPORT_APP_CACHE_STATE, DPORT_APP_CACHE… in cache_ll_l1_disable_cache()
/hal_espressif-latest/components/soc/esp32/include/soc/
Ddport_reg.h2967 #define DPORT_APP_DCACHE_DBUG0_REG (DR_REG_DPORT_BASE + 0x418) macro