Searched refs:CAM_LL_CLK_FRAC_DIV_N_MAX (Results 1 – 1 of 1) sorted by relevance
21 #define CAM_LL_CLK_FRAC_DIV_N_MAX 256 // CAM_CLK = CAM_CLK_S / (N + b/a), the N register is 8 bit-… macro153 HAL_ASSERT(div_num >= 2 && div_num < CAM_LL_CLK_FRAC_DIV_N_MAX); in cam_ll_set_group_clock_coeff()
