Home
last modified time | relevance | path

Searched refs:BIT0 (Results 1 – 25 of 35) sorted by relevance

12

/hal_espressif-latest/components/esp_rom/include/esp32/rom/
Drtc.h72 LIGHT_SLEEP = BIT0, //CPU waiti, PLL ON. We don't need explicitly set this mode.
110 EXT_EVENT0_TRIG = BIT0,
140 WAKEUP_INT = BIT0,
Dgpio.h52 … ((gpio_no < 32) ? ((gpio_input_get()>>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))…
Duart.h31 #define UART_RCV_INTEN BIT0
47 #define UART_RCV_DATA_RDY_FLAG BIT0
/hal_espressif-latest/components/esp_rom/include/esp32s2/rom/
Dgpio.h52 … ((gpio_no < 32) ? ((gpio_input_get()>>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))…
Drtc.h72 LIGHT_SLEEP = BIT0, //CPU waiti, PLL ON. We don't need explicitly set this mode.
115 EXT_EVENT0_TRIG = BIT0,
Duart.h32 #define UART_RCV_INTEN BIT0
48 #define UART_RCV_DATA_RDY_FLAG BIT0
/hal_espressif-latest/components/bt/host/bluedroid/external/sbc/decoder/include/
Doi_stddefs.h184 #ifndef BIT0
186 #define BIT0 0x00000001 /**< preprocessor alias for 32-bit value with bit 0 set, used to specify… macro
/hal_espressif-latest/components/esp_rom/include/esp32c2/rom/
Drtc.h79 LIGHT_SLEEP = BIT0, //CPU waiti, PLL ON. We don't need explicitly set this mode.
120 EXT_EVENT0_TRIG = BIT0,
Duart.h32 #define UART_RCV_INTEN BIT0
48 #define UART_RCV_DATA_RDY_FLAG BIT0
/hal_espressif-latest/components/esp_rom/include/esp32c3/rom/
Duart.h32 #define UART_RCV_INTEN BIT0
48 #define UART_RCV_DATA_RDY_FLAG BIT0
Drtc.h73 LIGHT_SLEEP = BIT0, //CPU waiti, PLL ON. We don't need explicitly set this mode.
122 EXT_EVENT0_TRIG = BIT0,
/hal_espressif-latest/components/esp_rom/include/esp32c6/rom/
Duart.h32 #define UART_RCV_INTEN BIT0
48 #define UART_RCV_DATA_RDY_FLAG BIT0
Drtc.h74 LIGHT_SLEEP = BIT0, //CPU waiti, PLL ON. We don't need explicitly set this mode.
122 EXT_EVENT0_TRIG = BIT0,
/hal_espressif-latest/components/esp_rom/include/esp32s3/rom/
Duart.h30 #define UART_RCV_INTEN BIT0
46 #define UART_RCV_DATA_RDY_FLAG BIT0
Drtc.h68 LIGHT_SLEEP = BIT0, //CPU waiti, PLL ON. We don't need explicitly set this mode.
117 EXT_EVENT0_TRIG = BIT0,
/hal_espressif-latest/components/esp_rom/include/esp32h2/rom/
Duart.h32 #define UART_RCV_INTEN BIT0
48 #define UART_RCV_DATA_RDY_FLAG BIT0
Drtc.h73 LIGHT_SLEEP = BIT0, //CPU waiti, PLL ON. We don't need explicitly set this mode.
121 EXT_EVENT0_TRIG = BIT0,
/hal_espressif-latest/components/esp_rom/include/
Desp_rom_spiflash_defs.h18 #define ESP_ROM_SPIFLASH_BUSY_FLAG BIT0
/hal_espressif-latest/components/esp_common/include/
Desp_bit_defs.h41 #define BIT0 0x00000001 macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dboot_mode.h97 #define SEL_SDIO_BOOT BIT0
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dboot_mode.h89 #define SEL_SDIO_BOOT BIT0
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dboot_mode.h96 #define SEL_SDIO_BOOT BIT0
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dboot_mode.h89 #define SEL_SDIO_BOOT BIT0
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dboot_mode.h97 #define SEL_SDIO_BOOT BIT0
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dboot_mode.h94 #define SEL_SDIO_BOOT BIT0

12