Searched refs:ALIGNUP (Results 1 – 4 of 4) sorted by relevance
/hal_espressif-latest/components/xtensa/include/xtensa/ |
D | xtensa_context.h | 52 #define ALIGNUP(n, val) (((val) + (n)-1) & -(n)) macro 170 #define XT_STK_EXTRA ALIGNUP(XCHAL_EXTRA_SA_ALIGN, XT_STK_NEXT1) 173 #define XT_STK_EXTRA (ALIGNUP(XCHAL_EXTRA_SA_ALIGN, XT_STK_NEXT1) + XCHAL_EXTRA_SA_ALIGN) 189 #define XT_STK_FRMSZ (ALIGNUP(0x10, XT_STK_NEXT2) + 0x20) 254 #define XT_SOL_FRMSZ ALIGNUP(0x10, XtSolFrameSize) 323 #define XT_CP1_SA ALIGNUP(XCHAL_CP1_SA_ALIGN, XT_CP0_SA + XCHAL_CP0_SA_SIZE) 324 #define XT_CP2_SA ALIGNUP(XCHAL_CP2_SA_ALIGN, XT_CP1_SA + XCHAL_CP1_SA_SIZE) 325 #define XT_CP3_SA ALIGNUP(XCHAL_CP3_SA_ALIGN, XT_CP2_SA + XCHAL_CP2_SA_SIZE) 326 #define XT_CP4_SA ALIGNUP(XCHAL_CP4_SA_ALIGN, XT_CP3_SA + XCHAL_CP3_SA_SIZE) 327 #define XT_CP5_SA ALIGNUP(XCHAL_CP5_SA_ALIGN, XT_CP4_SA + XCHAL_CP4_SA_SIZE) [all …]
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/hal_espressif-latest/components/riscv/include/riscv/ |
D | rvruntime-frames.h | 11 #define ALIGNUP(n, val) (((val) + (n) - 1) & -(n)) macro 94 #define RV_STK_FRMSZ (ALIGNUP(0x10, RV_STK_SZ1))
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D | rvsleep-frames.h | 13 #define ALIGNUP(n, val) (((val) + (n) - 1) & -(n)) macro 105 #define RV_SLEEP_CTX_FRMSZ (ALIGNUP(0x10, RV_SLEEP_CTX_SZ1))
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/hal_espressif-latest/components/esp_hw_support/ |
D | sleep_cpu.c | 110 code_seg_size = ALIGNUP(imode.cache_line_size, code_seg_size); in cache_tagmem_retention_setup() 120 icache_tagmem_blk_gs = ALIGNUP(4, icache_tagmem_blk_gs); in cache_tagmem_retention_setup() 130 data_seg_size = ALIGNUP(dmode.cache_line_size, data_seg_size); in cache_tagmem_retention_setup() 144 dcache_tagmem_blk_gs = ALIGNUP(4, dcache_tagmem_blk_gs); in cache_tagmem_retention_setup()
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